This is a issue involve RS bit set rule in ixgbe.
Let us take function i40e_xmit_pkts_vec () as an example,
in this function RS bit will be set for descriptor with index
txq->tx_next_rs, and also descriptor free function
i40e_tx_free_bufs() also check RS bit for descriptor with index
txq->tx_next_rs, This is perfect ok. Let us take an example,
if app set tx_rs_thresh = 32 and nb_desc = 512, then i40e PMD code
will init txq->tx_next_rs = 31 in function i40e_reset_tx_queue when
tx queue setup. And also txq->tx_next_rs will be update as 63, 95
and so on. But, in the function i40e_dev_tx_descriptor_status(),
the RS bit to check is " desc = ((desc + txq->tx_rs_thresh - 1) /
txq->tx_rs_thresh) * txq-tx_rs_thresh", which is 32 ,64, 96 and so on.
So, they are all wrong! In tx function of i40e_xmit_pkts_simple,
the RS bit rule is also the same, it also set index 31 ,64, 95.
we need to correct it.
Fixes: 68a43d1bb023 ("net/i40e: implement descriptor status API")
Signed-off-by: Wei Zhao <wei.zh...@intel.com>
---
drivers/net/i40e/i40e_rxtx.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 6032d55..7e37d8d 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -2032,15 +2032,15 @@ i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t
offset)
return -EINVAL;
desc = txq->tx_tail + offset;
+ if (desc >= txq->nb_tx_desc)
+ desc -= txq->nb_tx_desc;
/* go to next desc that has the RS bit */
- desc = ((desc + txq->tx_rs_thresh - 1) / txq->tx_rs_thresh) *
- txq->tx_rs_thresh;
- if (desc >= txq->nb_tx_desc) {
+ desc = (desc / txq->tx_rs_thresh + 1) *
+ txq->tx_rs_thresh - 1;
+ if (desc >= txq->nb_tx_desc)
desc -= txq->nb_tx_desc;
- if (desc >= txq->nb_tx_desc)
- desc -= txq->nb_tx_desc;
- }
+ desc = txq->sw_ring[desc].last_id;
status = &txq->tx_ring[desc].cmd_type_offset_bsz;
mask = rte_le_to_cpu_64(I40E_TXD_QW1_DTYPE_MASK);
expect = rte_cpu_to_le_64(
--
2.7.5
