The counter batch query requires ID to be aligned with 4.
Signed-off-by: Suanming Mou <suanmi...@mellanox.com>
Acked-by: Matan Azrad <ma...@mellanox.com>
---
drivers/common/mlx5/mlx5_prm.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index cb5f968..8565d25 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -818,6 +818,9 @@ enum {
*/
#define MLX5_CNT_BATCH_OFFSET 0x800000
+/* The counter batch query requires ID align with 4. */
+#define MLX5_CNT_BATCH_QUERY_ID_ALIGNMENT 4
+
/* Flow counters. */
struct mlx5_ifc_alloc_flow_counter_out_bits {
u8 status[0x8];
--
1.8.3.1
