20/07/2021 09:51, Alexander Kozyrev:
> Register C is used in the extensive metadata mode number 1 and its
> width can vary from 0 to 32 bits depending on the kernel usage of it.
>
> There are several issues associated with this mode (dv_xmeta_en=1):
> 1. The metadata setting assumes that the width is always 16 bits,
> which is the most common case in this mode. Use the proper mask.
> 2. The same is true for the modify_field Flow API. 16-bits width
> is hardcoded for dv_xmeta_en=1. Switch to the register C mask width.
> 3. Metadata is stored in the most significant bits in CQE in this
> mode because the registers copy code was not updated during the
> metadata conversion to the big-endian format. Update this code to
> avoid shifting the metadata in the datapath.
>
> Fixes: b57e414b48 ("net/mlx5: convert meta register to big-endian")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Alexander Kozyrev <akozy...@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viachesl...@nvidia.com>
Applied, thanks
