This patch is not for LTS upstream, just for users to cherry-pick.
Add L4 support for QinQ switch filter as following flow patterns:
eth / vlan / vlan / ipv4 / udp
eth / vlan / vlan / ipv4 / tcp
eth / vlan / vlan / ipv6 / udp
eth / vlan / vlan / ipv6 / tcp
Signed-off-by: Steve Yang <stevex.y...@intel.com>
Signed-off-by: Wenjun Wu <wenjun1...@intel.com>
---
drivers/net/ice/ice_switch_filter.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/drivers/net/ice/ice_switch_filter.c
b/drivers/net/ice/ice_switch_filter.c
index 45fa9723d2..eed72d9446 100644
--- a/drivers/net/ice/ice_switch_filter.c
+++ b/drivers/net/ice/ice_switch_filter.c
@@ -44,6 +44,12 @@
ICE_INSET_IPV4_PROTO | ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_TOS)
#define ICE_SW_INSET_MAC_QINQ_IPV4 ( \
ICE_SW_INSET_MAC_QINQ | ICE_SW_INSET_MAC_IPV4)
+#define ICE_SW_INSET_MAC_QINQ_IPV4_TCP ( \
+ ICE_SW_INSET_MAC_QINQ_IPV4 | \
+ ICE_INSET_TCP_DST_PORT | ICE_INSET_TCP_SRC_PORT)
+#define ICE_SW_INSET_MAC_QINQ_IPV4_UDP ( \
+ ICE_SW_INSET_MAC_QINQ_IPV4 | \
+ ICE_INSET_UDP_DST_PORT | ICE_INSET_UDP_SRC_PORT)
#define ICE_SW_INSET_MAC_IPV4_TCP ( \
ICE_INSET_DMAC | ICE_INSET_IPV4_DST | ICE_INSET_IPV4_SRC | \
ICE_INSET_IPV4_TTL | ICE_INSET_IPV4_TOS | \
@@ -58,6 +64,12 @@
ICE_INSET_IPV6_NEXT_HDR)
#define ICE_SW_INSET_MAC_QINQ_IPV6 ( \
ICE_SW_INSET_MAC_QINQ | ICE_SW_INSET_MAC_IPV6)
+#define ICE_SW_INSET_MAC_QINQ_IPV6_TCP ( \
+ ICE_SW_INSET_MAC_QINQ_IPV6 | \
+ ICE_INSET_TCP_DST_PORT | ICE_INSET_TCP_SRC_PORT)
+#define ICE_SW_INSET_MAC_QINQ_IPV6_UDP ( \
+ ICE_SW_INSET_MAC_QINQ_IPV6 | \
+ ICE_INSET_UDP_DST_PORT | ICE_INSET_UDP_SRC_PORT)
#define ICE_SW_INSET_MAC_IPV6_TCP ( \
ICE_INSET_DMAC | ICE_INSET_IPV6_DST | ICE_INSET_IPV6_SRC | \
ICE_INSET_IPV6_HOP_LIMIT | ICE_INSET_IPV6_TC | \
@@ -274,8 +286,16 @@ ice_pattern_match_item ice_switch_pattern_dist_comms[] = {
ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv4,
ICE_SW_INSET_MAC_QINQ_IPV4, ICE_INSET_NONE},
+ {pattern_eth_qinq_ipv4_tcp,
+ ICE_SW_INSET_MAC_QINQ_IPV4_TCP, ICE_INSET_NONE},
+ {pattern_eth_qinq_ipv4_udp,
+ ICE_SW_INSET_MAC_QINQ_IPV4_UDP, ICE_INSET_NONE},
{pattern_eth_qinq_ipv6,
ICE_SW_INSET_MAC_QINQ_IPV6, ICE_INSET_NONE},
+ {pattern_eth_qinq_ipv6_tcp,
+ ICE_SW_INSET_MAC_QINQ_IPV6_TCP, ICE_INSET_NONE},
+ {pattern_eth_qinq_ipv6_udp,
+ ICE_SW_INSET_MAC_QINQ_IPV6_UDP, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes,
ICE_SW_INSET_MAC_PPPOE, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes_proto,
@@ -410,8 +430,16 @@ ice_pattern_match_item ice_switch_pattern_perm_comms[] = {
ICE_INSET_NONE, ICE_INSET_NONE},
{pattern_eth_qinq_ipv4,
ICE_SW_INSET_MAC_QINQ_IPV4, ICE_INSET_NONE},
+ {pattern_eth_qinq_ipv4_tcp,
+ ICE_SW_INSET_MAC_QINQ_IPV4_TCP, ICE_INSET_NONE},
+ {pattern_eth_qinq_ipv4_udp,
+ ICE_SW_INSET_MAC_QINQ_IPV4_UDP, ICE_INSET_NONE},
{pattern_eth_qinq_ipv6,
ICE_SW_INSET_MAC_QINQ_IPV6, ICE_INSET_NONE},
+ {pattern_eth_qinq_ipv6_tcp,
+ ICE_SW_INSET_MAC_QINQ_IPV6_TCP, ICE_INSET_NONE},
+ {pattern_eth_qinq_ipv6_udp,
+ ICE_SW_INSET_MAC_QINQ_IPV6_UDP, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes,
ICE_SW_INSET_MAC_PPPOE, ICE_INSET_NONE},
{pattern_eth_qinq_pppoes_proto,
--
2.25.1
