Add enable/disable TX laser configuration code for Amber-Lite NICs. Due to hardware design differences, the GPIO controlling the TX laser on Amber-Lite NICs differs from Sapphire NICs, requiring corresponding configuration changes.
Signed-off-by: Zaiyu Wang <[email protected]> --- drivers/net/txgbe/base/txgbe_hw.c | 31 ++++++++++++++++++++++++----- drivers/net/txgbe/base/txgbe_regs.h | 10 ++++++++++ 2 files changed, 36 insertions(+), 5 deletions(-) diff --git a/drivers/net/txgbe/base/txgbe_hw.c b/drivers/net/txgbe/base/txgbe_hw.c index d845fd0a69..3cbb21a686 100644 --- a/drivers/net/txgbe/base/txgbe_hw.c +++ b/drivers/net/txgbe/base/txgbe_hw.c @@ -3179,12 +3179,28 @@ void txgbe_disable_tx_laser_multispeed_fiber(struct txgbe_hw *hw) { u32 esdp_reg = rd32(hw, TXGBE_GPIODATA); - if (txgbe_close_notify(hw)) - txgbe_led_off(hw, TXGBE_LEDCTL_UP | TXGBE_LEDCTL_10G | - TXGBE_LEDCTL_1G | TXGBE_LEDCTL_ACTIVE); + if (txgbe_close_notify(hw)) { + /* over write led when ifconfig down */ + if (hw->mac.type == txgbe_mac_aml40) { + txgbe_led_off(hw, TXGBE_LEDCTL_UP | TXGBE_AMLITE_LED_LINK_40G | + TXGBE_AMLITE_LED_LINK_ACTIVE); + } else if (hw->mac.type == txgbe_mac_aml) + txgbe_led_off(hw, TXGBE_LEDCTL_UP | TXGBE_AMLITE_LED_LINK_25G | + TXGBE_AMLITE_LED_LINK_10G | TXGBE_AMLITE_LED_LINK_ACTIVE); + else + txgbe_led_off(hw, TXGBE_LEDCTL_UP | TXGBE_LEDCTL_10G | + TXGBE_LEDCTL_1G | TXGBE_LEDCTL_ACTIVE); + } /* Disable Tx laser; allow 100us to go dark per spec */ - esdp_reg |= (TXGBE_GPIOBIT_0 | TXGBE_GPIOBIT_1); + if (hw->mac.type == txgbe_mac_aml40) { + wr32m(hw, TXGBE_GPIODIR, TXGBE_GPIOBIT_1, TXGBE_GPIOBIT_1); + esdp_reg &= ~TXGBE_GPIOBIT_1; + } else if (hw->mac.type == txgbe_mac_aml) { + esdp_reg |= TXGBE_GPIOBIT_1; + } else { + esdp_reg |= (TXGBE_GPIOBIT_0 | TXGBE_GPIOBIT_1); + } wr32(hw, TXGBE_GPIODATA, esdp_reg); txgbe_flush(hw); usec_delay(100); @@ -3206,7 +3222,12 @@ void txgbe_enable_tx_laser_multispeed_fiber(struct txgbe_hw *hw) wr32(hw, TXGBE_LEDCTL, 0); /* Enable Tx laser; allow 100ms to light up */ - esdp_reg &= ~(TXGBE_GPIOBIT_0 | TXGBE_GPIOBIT_1); + if (hw->mac.type == txgbe_mac_aml40) { + wr32m(hw, TXGBE_GPIODIR, TXGBE_GPIOBIT_1, TXGBE_GPIOBIT_1); + esdp_reg |= TXGBE_GPIOBIT_1; + } else { + esdp_reg &= ~(TXGBE_GPIOBIT_0 | TXGBE_GPIOBIT_1); + } wr32(hw, TXGBE_GPIODATA, esdp_reg); txgbe_flush(hw); msec_delay(100); diff --git a/drivers/net/txgbe/base/txgbe_regs.h b/drivers/net/txgbe/base/txgbe_regs.h index 00c41a5b86..2e0ac9c742 100644 --- a/drivers/net/txgbe/base/txgbe_regs.h +++ b/drivers/net/txgbe/base/txgbe_regs.h @@ -302,6 +302,16 @@ #define TXGBE_PORT_LINK1000M MS(2, 0x1) #define TXGBE_PORT_LINK100M MS(3, 0x1) #define TXGBE_PORT_LANID(r) RS(r, 8, 0x1) +#define TXGBE_AMLITE_CFG_LED_CTL_LINK_BSY_SEL MS(5, 0x1) +#define TXGBE_AMLITE_CFG_LED_CTL_LINK_10G_SEL MS(4, 0x1) +#define TXGBE_AMLITE_CFG_LED_CTL_LINK_25G_SEL MS(3, 0x1) +#define TXGBE_AMLITE_CFG_LED_CTL_LINK_40G_SEL MS(2, 0x1) +#define TXGBE_AMLITE_CFG_LED_CTL_LINK_50G_SEL MS(1, 0x1) +#define TXGBE_AMLITE_LED_LINK_ACTIVE TXGBE_AMLITE_CFG_LED_CTL_LINK_BSY_SEL +#define TXGBE_AMLITE_LED_LINK_10G TXGBE_AMLITE_CFG_LED_CTL_LINK_10G_SEL +#define TXGBE_AMLITE_LED_LINK_25G TXGBE_AMLITE_CFG_LED_CTL_LINK_25G_SEL +#define TXGBE_AMLITE_LED_LINK_40G TXGBE_AMLITE_CFG_LED_CTL_LINK_40G_SEL +#define TXGBE_AMLITE_LED_LINK_50G TXGBE_AMLITE_CFG_LED_CTL_LINK_50G_SEL #define TXGBE_EXTAG 0x014408 #define TXGBE_EXTAG_ETAG_MASK MS(0, 0xFFFF) #define TXGBE_EXTAG_ETAG(v) LS(v, 0, 0xFFFF) -- 2.21.0.windows.1
