On Thu, 9 Jul 2026 at 18:04, David Marchand <[email protected]> wrote:
> diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h
> b/drivers/common/mlx5/mlx5_devx_cmds.h
> index 90beb2e9e6..7fe89bc6a4 100644
> --- a/drivers/common/mlx5/mlx5_devx_cmds.h
> +++ b/drivers/common/mlx5/mlx5_devx_cmds.h
> @@ -356,6 +356,8 @@ struct mlx5_hca_attr {
> uint8_t tx_sw_owner_v2:1;
> uint8_t esw_sw_owner:1;
> uint8_t esw_sw_owner_v2:1;
> + uint32_t log_max_current_uc_list:5;
> + uint32_t log_max_current_mc_list:5;
uint8_t is enough.
> };
>
> /* LAG Context. */
[...]
> diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
> index f7ba8df108..1fcc40fade 100644
> --- a/drivers/net/mlx5/mlx5.h
> +++ b/drivers/net/mlx5/mlx5.h
> @@ -217,6 +217,9 @@ struct mlx5_dev_cap {
> } mprq; /* Capability for Multi-Packet RQ. */
> char fw_ver[64]; /* Firmware version of this device. */
> struct flow_hw_port_info esw_info; /* E-switch manager reg_c0. */
> + uint16_t max_uc_mac_addrs; /* Maximum unicast MAC addresses. */
> + uint16_t max_mc_mac_addrs; /* Maximum multicast MAC addresses. */
> + uint16_t max_mac_addrs; /* Total maximum MAC addresses. */
> };
>
> #define MLX5_MPESW_PORT_INVALID (-1)
The firmware provides a log value on 5 bits, so max value for uc and
mc would be 1 << 31, and the sum would be up to 1 << 32.
In theory, ethdev caps max_mac_addrs to 1 << 32 - 1, but the firmware
only allows up to 4k uc macs and extending this limit has been said
not possible easily.
So reaching 1 << 32 as a total is not going to happen soon and
uint32_t is enough for those 3 fields.
In next revision.
--
David Marchand
