From: Mark Blasko <[email protected]> Replace the boolean nic_timestamp_supported field with enum gve_dev_clk_type to represent the device clock read mode (unsupported, Cmd). Update AdminQ capability negotiation and ethdev operations to check clk_read_type.
Signed-off-by: Mark Blasko <[email protected]> Signed-off-by: Joshua Washington <[email protected]> --- drivers/net/gve/base/gve_adminq.c | 5 +++-- drivers/net/gve/gve_ethdev.c | 9 ++++++--- drivers/net/gve/gve_ethdev.h | 7 ++++++- 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/net/gve/base/gve_adminq.c b/drivers/net/gve/base/gve_adminq.c index 60e8544ef4..6fd9323f0c 100644 --- a/drivers/net/gve/base/gve_adminq.c +++ b/drivers/net/gve/base/gve_adminq.c @@ -994,9 +994,10 @@ static void gve_enable_supported_features(struct gve_priv *priv, priv->max_mtu = be16_to_cpu(dev_op_jumbo_frames->max_mtu); } if (dev_op_nic_timestamp && - (supported_features_mask & GVE_SUP_NIC_TIMESTAMP_MASK)) { + (supported_features_mask & GVE_SUP_NIC_TIMESTAMP_MASK) && + !gve_is_gqi(priv)) { PMD_DRV_LOG(INFO, "NIC TIMESTAMP device option enabled."); - priv->nic_timestamp_supported = true; + priv->clk_read_type = GVE_DEV_CLK_CMD; } } diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c index 5a2f95ae19..a1deadc8ba 100644 --- a/drivers/net/gve/gve_ethdev.c +++ b/drivers/net/gve/gve_ethdev.c @@ -554,6 +554,9 @@ gve_alloc_nic_ts_report(struct gve_priv *priv) { char z_name[RTE_MEMZONE_NAMESIZE]; + if (priv->clk_read_type == GVE_DEV_CLK_UNSUPPORTED) + return -EOPNOTSUPP; + snprintf(z_name, sizeof(z_name), "gve_%s_nic_ts_report", priv->pci_dev->device.name); priv->nic_ts_report_mz = rte_memzone_reserve_aligned(z_name, @@ -865,7 +868,7 @@ gve_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->min_mtu = RTE_ETHER_MIN_MTU; dev_info->rx_offload_capa = RTE_ETH_RX_OFFLOAD_RSS_HASH; - if (!gve_is_gqi(priv) && priv->nic_ts_report_mz) + if (priv->clk_read_type != GVE_DEV_CLK_UNSUPPORTED) dev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TIMESTAMP; dev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_MULTI_SEGS | @@ -1342,7 +1345,7 @@ gve_read_clock(struct rte_eth_dev *dev, uint64_t *clock) uint64_t ts; int err; - if (!priv->nic_timestamp_supported) + if (priv->clk_read_type == GVE_DEV_CLK_UNSUPPORTED) return -EOPNOTSUPP; if (!priv->nic_ts_report_mz) @@ -1443,7 +1446,7 @@ gve_setup_nic_timestamp(struct gve_priv *priv) { int err; - if (!priv->nic_timestamp_supported) + if (priv->clk_read_type == GVE_DEV_CLK_UNSUPPORTED) return; rte_atomic_store_explicit(&priv->nic_ts_read_fails, 0, rte_memory_order_relaxed); diff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h index ef93db0c1d..21454802f9 100644 --- a/drivers/net/gve/gve_ethdev.h +++ b/drivers/net/gve/gve_ethdev.h @@ -274,6 +274,11 @@ extern const struct rte_flow_ops gve_flow_ops; struct gve_priv; struct gve_flow_rule_params; +enum gve_dev_clk_type { + GVE_DEV_CLK_UNSUPPORTED = 0, + GVE_DEV_CLK_CMD, +}; + struct gve_ctrl_ops { int (*init_ctrl_plane)(struct gve_priv *priv); void (*free_ctrl_plane)(struct gve_priv *priv); @@ -411,7 +416,7 @@ struct gve_priv { TAILQ_HEAD(, gve_flow) active_flows; /* HW Timestamping Fields */ - bool nic_timestamp_supported; + enum gve_dev_clk_type clk_read_type; const struct rte_memzone *nic_ts_report_mz; struct gve_nic_ts_report *nic_ts_report; pthread_mutex_t nic_ts_lock; -- 2.56.0.rc1.315.gc6ed9934b7-goog
