From: Stephen Hemminger <[email protected]> Direct assignment to or reading from an atomic variable defaults to sequentially consistent memory order in C11. Since cross-thread memory ordering for packet callback execution and unload is already explicitly enforced by memory barriers, sequentially consistent accesses are unnecessary and may emit redundant barrier or locked instructions on weakly ordered architectures.
Update bpf_eth_cbi_inuse() and bpf_eth_cbi_unuse() to use rte_atomic_store_explicit() with rte_memory_order_relaxed, and update bpf_eth_cbi_wait() to use rte_atomic_load_explicit() with rte_memory_order_relaxed. Originally proposed by Stephen Hemminger as part of a series replacing deprecated SMP barriers with C11 fences. Signed-off-by: Stephen Hemminger <[email protected]> Signed-off-by: Marat Khalili <[email protected]> --- lib/bpf/bpf_pkt.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/bpf/bpf_pkt.c b/lib/bpf/bpf_pkt.c index 55f5947460..c5fa85bf84 100644 --- a/lib/bpf/bpf_pkt.c +++ b/lib/bpf/bpf_pkt.c @@ -132,7 +132,7 @@ static struct bpf_eth_cbh tx_cbh = { static __rte_always_inline void bpf_eth_cbi_inuse(struct bpf_eth_cbi *cbi) { - cbi->use = true; + rte_atomic_store_explicit(&cbi->use, true, rte_memory_order_relaxed); /* make sure no store/load reordering could happen */ rte_smp_mb(); } @@ -145,7 +145,7 @@ bpf_eth_cbi_unuse(struct bpf_eth_cbi *cbi) { /* make sure all previous loads are completed */ rte_smp_rmb(); - cbi->use = false; + rte_atomic_store_explicit(&cbi->use, false, rte_memory_order_relaxed); } /* @@ -158,7 +158,7 @@ bpf_eth_cbi_wait(const struct bpf_eth_cbi *cbi) rte_smp_mb(); /* in use, busy wait till current RX/TX iteration is finished */ - while (cbi->use) + while (rte_atomic_load_explicit(&cbi->use, rte_memory_order_relaxed)) rte_pause(); } -- 2.43.0
