E830 supports at most 8096 descriptors per ring, but the advertised
descriptor limits and the Rx/Tx queue setup checks used the generic
maximum of 8160. Only the ring allocation honoured the E830 limit.
An application could therefore request up to 8160 descriptors on E830.
With Tx packet pacing enabled, the Tx time queue length (Tx descriptors
plus a fetch margin) overflows the 13-bit queue length field, wraps to
zero and triggers a Malicious Driver Detection event.
Use ICE_MAX_NUM_DESC_BY_MAC() for the advertised limits and the queue
setup checks so they match the ring allocation.
Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830")
Cc: [email protected]
Signed-off-by: Sandeep Penigalapati <[email protected]>
---
v2:
- No functional change. Added a short comment on the descriptor-limit
defines pointing ring-facing limits at ICE_MAX_NUM_DESC_BY_MAC(),
per review feedback.
drivers/net/intel/ice/ice_ethdev.c | 6 +++---
drivers/net/intel/ice/ice_rxtx.c | 4 ++--
drivers/net/intel/ice/ice_rxtx.h | 4 ++++
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/net/intel/ice/ice_ethdev.c
b/drivers/net/intel/ice/ice_ethdev.c
index dfee07c457..fd239031ac 100644
--- a/drivers/net/intel/ice/ice_ethdev.c
+++ b/drivers/net/intel/ice/ice_ethdev.c
@@ -4802,17 +4802,17 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct
rte_eth_dev_info *dev_info)
};
dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
- .nb_max = ICE_MAX_RING_DESC,
+ .nb_max = ICE_MAX_NUM_DESC_BY_MAC(hw),
.nb_min = ICE_MIN_RING_DESC,
.nb_align = ICE_ALIGN_RING_DESC,
};
dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
- .nb_max = ICE_MAX_RING_DESC,
+ .nb_max = ICE_MAX_NUM_DESC_BY_MAC(hw),
.nb_min = ICE_MIN_RING_DESC,
.nb_align = ICE_ALIGN_RING_DESC,
.nb_mtu_seg_max = ICE_TX_MTU_SEG_MAX,
- .nb_seg_max = ICE_MAX_RING_DESC,
+ .nb_seg_max = ICE_MAX_NUM_DESC_BY_MAC(hw),
};
dev_info->speed_capa = RTE_ETH_LINK_SPEED_10M |
diff --git a/drivers/net/intel/ice/ice_rxtx.c b/drivers/net/intel/ice/ice_rxtx.c
index b333444cbf..dbb32bdb87 100644
--- a/drivers/net/intel/ice/ice_rxtx.c
+++ b/drivers/net/intel/ice/ice_rxtx.c
@@ -1293,7 +1293,7 @@ ice_rx_queue_setup(struct rte_eth_dev *dev,
uint16_t i;
if (nb_desc % ICE_ALIGN_RING_DESC != 0 ||
- nb_desc > ICE_MAX_RING_DESC ||
+ nb_desc > ICE_MAX_NUM_DESC_BY_MAC(hw) ||
nb_desc < ICE_MIN_RING_DESC) {
PMD_INIT_LOG(ERR, "Number (%u) of receive descriptors is "
"invalid", nb_desc);
@@ -1510,7 +1510,7 @@ ice_tx_queue_setup(struct rte_eth_dev *dev,
offloads = tx_conf->offloads | dev->data->dev_conf.txmode.offloads;
if (nb_desc % ICE_ALIGN_RING_DESC != 0 ||
- nb_desc > ICE_MAX_RING_DESC ||
+ nb_desc > ICE_MAX_NUM_DESC_BY_MAC(hw) ||
nb_desc < ICE_MIN_RING_DESC) {
PMD_INIT_LOG(ERR, "Number (%u) of transmit descriptors is "
"invalid", nb_desc);
diff --git a/drivers/net/intel/ice/ice_rxtx.h b/drivers/net/intel/ice/ice_rxtx.h
index cd23f7c56f..62d32185fc 100644
--- a/drivers/net/intel/ice/ice_rxtx.h
+++ b/drivers/net/intel/ice/ice_rxtx.h
@@ -22,6 +22,10 @@
#define ICE_ALIGN_RING_DESC 32
#define ICE_MIN_RING_DESC 64
+/*
+ * E830 needs a lower cap, so use ICE_MAX_NUM_DESC_BY_MAC() for ring
+ * limits rather than ICE_MAX_RING_DESC directly.
+ */
#define ICE_MAX_RING_DESC (8192 - 32)
#define ICE_MAX_RING_DESC_E830 8096
#define ICE_MAX_NUM_DESC_BY_MAC(hw) ((hw)->phy_model == \
--
2.34.1
