On Mon, Oct 19, 2026 at 02:24:36PM +0100, Bruce Richardson wrote:
> On Mon, Oct 12, 2026 at 04:12:26PM +0000, Sandeep Penigalapati wrote:
> > E830 supports at most 8096 descriptors per ring, but the advertised
> > descriptor limits and the Rx/Tx queue setup checks used the generic
> > maximum of 8160. Only the ring allocation honoured the E830 limit.
> >
> > An application could therefore request up to 8160 descriptors on E830.
> > With Tx packet pacing enabled, the Tx time queue length (Tx descriptors
> > plus a fetch margin) overflows the 13-bit queue length field, wraps to
> > zero and triggers a Malicious Driver Detection event.
> >
> > Use ICE_MAX_NUM_DESC_BY_MAC() for the advertised limits and the queue
> > setup checks so they match the ring allocation.
> >
> > Fixes: 0b6ff09a1f19 ("net/intel: support Tx packet pacing for E830")
> > Cc: [email protected]
> > Signed-off-by: Sandeep Penigalapati <[email protected]>
> > ---
> > v2:
> > - No functional change. Added a short comment on the descriptor-limit
> > defines pointing ring-facing limits at ICE_MAX_NUM_DESC_BY_MAC(),
> > per review feedback.
> Acked-by: Bruce Richardson <[email protected]>
Applied to dpdk-next-net-intel.
Thanks,
/Bruce
