From: Santosh Shukla <santosh.shu...@caviumnetworks.com>

Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.

CC: Harish Patil <harish.pa...@cavium.com>
CC: Rasesh Mody <rasesh.m...@cavium.com>
Signed-off-by: Santosh Shukla <santosh.shu...@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.ja...@caviumnetworks.com>
---
 drivers/net/qede/base/bcm_osal.h      | 20 +++++++++++---------
 drivers/net/qede/base/ecore_int_api.h | 28 +++++++++++++++++++++++-----
 drivers/net/qede/base/ecore_spq.c     |  3 ++-
 drivers/net/qede/qede_rxtx.c          |  2 +-
 4 files changed, 37 insertions(+), 16 deletions(-)

diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index 0b446f2..33d43c6 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -18,6 +18,7 @@
 #include <rte_cycles.h>
 #include <rte_debug.h>
 #include <rte_ether.h>
+#include <rte_io.h>
 
 /* Forward declaration */
 struct ecore_dev;
@@ -113,18 +114,18 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *, 
dma_addr_t *,
 
 /* HW reads/writes */
 
-#define DIRECT_REG_RD(_dev, _reg_addr) \
-       (*((volatile u32 *) (_reg_addr)))
+#define DIRECT_REG_RD(_dev, _reg_addr) rte_read32(_reg_addr)
 
 #define REG_RD(_p_hwfn, _reg_offset) \
        DIRECT_REG_RD(_p_hwfn,          \
                        ((u8 *)(uintptr_t)(_p_hwfn->regview) + (_reg_offset)))
 
-#define DIRECT_REG_WR16(_reg_addr, _val) \
-       (*((volatile u16 *)(_reg_addr)) = _val)
+#define DIRECT_REG_WR16(_reg_addr, _val) rte_write16((_val), (_reg_addr))
 
-#define DIRECT_REG_WR(_dev, _reg_addr, _val) \
-       (*((volatile u32 *)(_reg_addr)) = _val)
+#define DIRECT_REG_WR(_dev, _reg_addr, _val) rte_write32((_val), (_reg_addr))
+
+#define DIRECT_REG_WR_RELAXED(_dev, _reg_addr, _val) \
+       rte_write32_relaxed((_val), (_reg_addr))
 
 #define REG_WR(_p_hwfn, _reg_offset, _val) \
        DIRECT_REG_WR(NULL,  \
@@ -134,9 +135,10 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *, 
dma_addr_t *,
        DIRECT_REG_WR16(((u8 *)(uintptr_t)(_p_hwfn->regview) + \
                        (_reg_offset)), (u16)_val)
 
-#define DOORBELL(_p_hwfn, _db_addr, _val) \
-       DIRECT_REG_WR(_p_hwfn, \
-            ((u8 *)(uintptr_t)(_p_hwfn->doorbells) + (_db_addr)), (u32)_val)
+#define DOORBELL(_p_hwfn, _db_addr, _val)                              \
+       DIRECT_REG_WR_RELAXED((_p_hwfn),                                \
+                             ((u8 *)(uintptr_t)(_p_hwfn->doorbells) +  \
+                             (_db_addr)), (u32)_val)
 
 /* Mutexes */
 
diff --git a/drivers/net/qede/base/ecore_int_api.h 
b/drivers/net/qede/base/ecore_int_api.h
index fc873e7..a0d6a43 100644
--- a/drivers/net/qede/base/ecore_int_api.h
+++ b/drivers/net/qede/base/ecore_int_api.h
@@ -120,19 +120,37 @@ static OSAL_INLINE void __internal_ram_wr(void *p_hwfn,
 }
 
 #ifdef ECORE_CONFIG_DIRECT_HWFN
+static OSAL_INLINE void __internal_ram_wr_relaxed(struct ecore_hwfn *p_hwfn,
+                                                 void OSAL_IOMEM * addr,
+                                                 int size, u32 *data)
+#else
+static OSAL_INLINE void __internal_ram_wr_relaxed(void *p_hwfn,
+                                                 void OSAL_IOMEM * addr,
+                                                 int size, u32 *data)
+#endif
+{
+       unsigned int i;
+
+       for (i = 0; i < size / sizeof(*data); i++)
+               DIRECT_REG_WR_RELAXED(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i],
+                                     data[i]);
+}
+
+#ifdef ECORE_CONFIG_DIRECT_HWFN
 static OSAL_INLINE void internal_ram_wr(struct ecore_hwfn *p_hwfn,
-                                       void OSAL_IOMEM *addr,
-                                       int size, u32 *data)
+                                               void OSAL_IOMEM * addr,
+                                               int size, u32 *data)
 {
-       __internal_ram_wr(p_hwfn, addr, size, data);
+       __internal_ram_wr_relaxed(p_hwfn, addr, size, data);
 }
 #else
 static OSAL_INLINE void internal_ram_wr(void OSAL_IOMEM *addr,
-                                       int size, u32 *data)
+                                               int size, u32 *data)
 {
-       __internal_ram_wr(OSAL_NULL, addr, size, data);
+       __internal_ram_wr_relaxed(OSAL_NULL, addr, size, data);
 }
 #endif
+
 #endif
 
 struct ecore_hwfn;
diff --git a/drivers/net/qede/base/ecore_spq.c 
b/drivers/net/qede/base/ecore_spq.c
index 0d744dd..6e5ce5d 100644
--- a/drivers/net/qede/base/ecore_spq.c
+++ b/drivers/net/qede/base/ecore_spq.c
@@ -248,7 +248,8 @@ static enum _ecore_status_t ecore_spq_hw_post(struct 
ecore_hwfn *p_hwfn,
        /* make sure the SPQE is updated before the doorbell */
        OSAL_WMB(p_hwfn->p_dev);
 
-       DOORBELL(p_hwfn, DB_ADDR(p_spq->cid, DQ_DEMS_LEGACY), *(u32 *)&db);
+       DOORBELL(p_hwfn, DB_ADDR(p_spq->cid, DQ_DEMS_LEGACY),
+                *(u32 *)&db);
 
        /* make sure doorbell is rang */
        OSAL_WMB(p_hwfn->p_dev);
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index 2e181c8..e1e9956 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -1246,7 +1246,7 @@ qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, 
uint16_t nb_pkts)
        txq->tx_db.data.bd_prod = bd_prod;
        rte_wmb();
        rte_compiler_barrier();
-       DIRECT_REG_WR(edev, txq->doorbell_addr, txq->tx_db.raw);
+       DIRECT_REG_WR_RELAXED(edev, txq->doorbell_addr, txq->tx_db.raw);
        rte_wmb();
 
        /* Check again for Tx completions */
-- 
2.5.5

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