The patch does not provide any functional change for ppc_64.
I/O barriers are mapped to existing smp barriers.
CC: Chao Zhu <chao...@linux.vnet.ibm.com>
Signed-off-by: Jerin Jacob <jerin.ja...@caviumnetworks.com>
---
lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
index fb4fccb..150810c 100644
--- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
@@ -87,6 +87,12 @@ extern "C" {
#define rte_smp_rmb() rte_rmb()
+#define rte_io_mb() rte_mb()
+
+#define rte_io_wmb() rte_wmb()
+
+#define rte_io_rmb() rte_rmb()
+
/*------------------------- 16 bit atomic operations
-------------------------*/
/* To be compatible with Power7, use GCC built-in functions for 16 bit
* operations */
--
2.5.5
