> -----Original Message----- > From: Richardson, Bruce [mailto:bruce.richard...@intel.com] > Sent: Wednesday, April 4, 2018 4:08 PM > To: Shreyansh Jain <shreyansh.j...@nxp.com>; Xu, Rosen > <rosen...@intel.com>; dev@dpdk.org > Cc: Doherty, Declan <declan.dohe...@intel.com>; Yigit, Ferruh > <ferruh.yi...@intel.com>; Ananyev, Konstantin > <konstantin.anan...@intel.com>; Zhang, Tianfei > <tianfei.zh...@intel.com>; Wu, Hao <hao...@intel.com>; > gaetan.ri...@6wind.com > Subject: RE: [PATCH v5 0/3] Introduce Intel FPGA BUS > > > > > -----Original Message----- > > From: Shreyansh Jain [mailto:shreyansh.j...@nxp.com] > > Sent: Wednesday, April 4, 2018 11:14 AM > > To: Xu, Rosen <rosen...@intel.com>; dev@dpdk.org > > Cc: Doherty, Declan <declan.dohe...@intel.com>; Richardson, Bruce > > <bruce.richard...@intel.com>; Yigit, Ferruh <ferruh.yi...@intel.com>; > > Ananyev, Konstantin <konstantin.anan...@intel.com>; Zhang, Tianfei > > <tianfei.zh...@intel.com>; Wu, Hao <hao...@intel.com>; > > gaetan.ri...@6wind.com > > Subject: RE: [PATCH v5 0/3] Introduce Intel FPGA BUS > > > > Hello Rosen, > > > > > -----Original Message----- > > > From: Rosen Xu [mailto:rosen...@intel.com] > > > Sent: Wednesday, April 4, 2018 12:21 PM > > > To: dev@dpdk.org > > > Cc: declan.dohe...@intel.com; bruce.richard...@intel.com; Shreyansh > > > Jain <shreyansh.j...@nxp.com>; ferruh.yi...@intel.com; > > > konstantin.anan...@intel.com; tianfei.zh...@intel.com; > > > hao...@intel.com; gaetan.ri...@6wind.com > > > Subject: [PATCH v5 0/3] Introduce Intel FPGA BUS > > > > > > Intel FPGA BUS in DPDK > > > ------------------------- > > > > > > This patch set introduces Intel FPGA BUS support in DPDK. > > > > > > v5 updates: > > > =========== > > > - Fixed SHARED LIB Build issue > > > - Changed command name to IFPGA Rawdev name, > > > so remove pci library datastruct and function. > > > - Fixed PATCH v2/v3/v4 comments > > > > > > > [...] > > > > Primary problems I see with your patches: > > 1. They are not split enough. Still the patch 2/3 is dependent on 3/3. > > That mean, it would break the compilation. There is no simpler way to > > solve this except breaking the patch into multiple patches and slowly > > introducing each function/feature. > > (One obvious way would be to have 3/3 as 2/3 and vice-versa - Not > sure > > what that blocks). > > > > 2. Documentation - there is none right now. Being a special use case > for > > PCI, I think a lot of people would benefit if you can explain the > comments > > about why iFPGA bus is required through documentation. > > > > 3. Meson as requested by Bruce. Problem you will face is that rawdev > > doesn't yet have meson enabled. I will work on that. If you can still > > rework your patches for (1)+(2), I think meson enable over rawdev > would be > > trivial. > > I just spotted this and I've sent a patch for rawdev. It was pretty > trivial. :-) > Please review and ack if you have the chance. The skeleton rawdev > however, I haven't > done, so feel free to patch in that.
:) Thanks. I'll review. I will push a dependent patch for skeleton_rawdev. > > /Bruce
