SDMMC write is working now too. So the driver can do the following: - Non-DMA read and write - DMA read and write in SDMA mode - 1 bit bus - 4 bit bus (widebus) - up to 25Mhz
I'm going to work on cleanup, documentation, and PR next. I'll post a branch here when I get it somewhat cleaned up. -adam On Mon, Jun 15, 2020 at 9:14 PM Adam Feuer <a...@starcat.io> wrote: > SDMMC DMA read is working now too. I'll work on DMA write next. > > -adam > > On Fri, Jun 12, 2020 at 2:45 PM Adam Feuer <a...@starcat.io> wrote: > >> I got the SDMMC write to work as well. This is in non-DMA mode. I'm going >> to work on the DMA mode next. >> >> -adam >> -- >> Adam Feuer <a...@starcat.io> >> > > > -- > Adam Feuer <a...@starcat.io> > -- Adam Feuer <a...@starcat.io>
