Hi Tim, Cache flush after dma data copy was a hard nut we had. But it was on read, you face issues on write, I was to fast.
Maybe this samv7 PR helps also on your arch: https://github.com/apache/nuttx/pull/5513 Simon -- Ingenieurbüro-Filgis USt-IdNr.: DE305343278 -- sent by mobile phone Tim Hardisty <t...@hardisty.co.uk> schrieb am Mi., 17. Mai 2023, 20:31: > Good suggestion – thanks! > > From: Petro Karashchenko <petro.karashche...@gmail.com> > Reply to: "dev@nuttx.apache.org" <dev@nuttx.apache.org> > Date: Wednesday, 17 May 2023 at 19:28 > To: "dev@nuttx.apache.org" <dev@nuttx.apache.org> > Subject: Re: Odd DMA issue > > I think you can try to compare versus SAMv7 SPI+DMA driver that is working > well and see if there are obvious differences. > > BR, > Petro > > On Wed, May 17, 2023, 9:18 PM Simon Filgis <si...@ingenieurbuero-filgis.de > <mailto:si...@ingenieurbuero-filgis.de>> > wrote: > > D-Cache flush? > > -- > Ingenieurbüro-Filgis > USt-IdNr.: DE305343278 > -- > sent by mobile phone > > Tim Hardisty <t...@hardisty.co.uk<mailto:t...@hardisty.co.uk>> schrieb am > Mi., 17. Mai 2023, 20:05: > > > I am working on getting DMA working on the SPI peripheral of the SAMA5D2. > > > > DMA reads now work well, but the writes take absolutely forever…unless I > > have dma debug info enabled, when write transactions (to a GD25Q flash) > do > > then work. > > > > I’m working through it, as it sounds like a race condition or other > > timing/sequence problem but if anyone by any chance has encountered > > anything similar, clues or suggestions would be most welcome! > > > > Thx, > > > > Tim > > > > >
