From: Vijayenthiran Subramaniam <[email protected]> Add a new PCD to define the maximum number of address bits used for addresses within a chip. The value of this PCD can be used to derive the maximum addressable memory region for each chip and to calculate the address space offset of a remote chip on multi-chip platform.
In preparation of adding a multi-chip variant of the RD-N2 platform, use this new PCD to allow maximum address space of 64TB per chip for all RD-N2 platform variants. Signed-off-by: Vijayenthiran Subramaniam <[email protected]> Signed-off-by: Pranav Madhu <[email protected]> --- Platform/ARM/SgiPkg/SgiPlatform.dec | 5 ++++- Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc | 5 ++++- Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc | 5 ++++- Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 3 ++- Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf | 3 ++- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 3 ++- Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 ++++--- 7 files changed, 22 insertions(+), 9 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec index 8cd818a9bf64..b9be5c9060b6 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -1,5 +1,5 @@ # -# Copyright (c) 2018-2020, ARM Limited. All rights reserved. +# Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -90,5 +90,8 @@ gArmSgiTokenSpaceGuid.PcdOscLpiEnable|0|UINT32|0x00000025 gArmSgiTokenSpaceGuid.PcdOscCppcEnable|0|UINT32|0x00000026 + # Address bus width + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip|0x0|UINT64|0x00000027 + [Ppis] gNtFwConfigDtInfoPpiGuid = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } } diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc b/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc index 5d4b6ae726f6..0cffff577c42 100644 --- a/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020 - 2022, ARM Limited. All rights reserved. +# Copyright (c) 2020 - 2022, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -45,6 +45,9 @@ gArmTokenSpaceGuid.PcdPciMmio64Size|0x3000000000 gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x60000000 + # Address bus width - 4TB address space + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip|42 + # Timer & Watchdog interrupts gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv|92 gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv|91 diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc index 1e9cd0982f5c..78ee48e354a8 100644 --- a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020 - 2022, ARM Limited. All rights reserved. +# Copyright (c) 2020 - 2022, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -45,6 +45,9 @@ gArmTokenSpaceGuid.PcdPciMmio64Size|0x4000000000 gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x1010000000 + # Address bus width - 64TB address space + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip|46 + # Timer & Watchdog interrupts gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv|109 gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv|108 diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf index 1999bc1553e9..c96d0e40d2cd 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2020-2021, ARM Ltd. All rights reserved. +# Copyright (c) 2020 - 2022, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -66,6 +66,7 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf index deaca3719ae4..61a2f3a2452b 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf @@ -1,7 +1,7 @@ ## @file # ACPI table data and ASL sources required to boot the platform. # -# Copyright (c) 2020-2021, Arm Ltd. All rights reserved. +# Copyright (c) 2020 - 2022, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -66,6 +66,7 @@ gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf index 22e247ea4fae..1ca7679b4191 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -1,5 +1,5 @@ # -# Copyright (c) 2018-2020, ARM Limited. All rights reserved. +# Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -41,6 +41,7 @@ gArmPlatformTokenSpaceGuid.PcdCoreCount gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdDramBlock2Base gArmSgiTokenSpaceGuid.PcdDramBlock2Size gArmSgiTokenSpaceGuid.PcdGicSize diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h b/Platform/ARM/SgiPkg/Include/SgiPlatform.h index dddb58832d73..04390d6dcc20 100644 --- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h +++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2018-2021, ARM Limited. All rights reserved. +* Copyright (c) 2018 - 2022, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-2-Clause-Patent * @@ -54,8 +54,9 @@ #define MULTI_CHIP_MODE_DISABLED 0x0 #define MULTI_CHIP_MODE_ENABLED 0x1 -// Remote chip address offset (4TB per chip) -#define SGI_REMOTE_CHIP_MEM_OFFSET(n) ((1ULL << 42) * (n)) +// Remote chip address offset +#define SGI_REMOTE_CHIP_MEM_OFFSET(n) \ + ((1ULL << FixedPcdGet64 (PcdMaxAddressBitsPerChip)) * (n)) // Base address of the DRAM1 block in a remote chip #define SYSTEM_MEMORY_BASE_REMOTE(ChipId) \ -- 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#90776): https://edk2.groups.io/g/devel/message/90776 Mute This Topic: https://groups.io/mt/92015420/21656 Group Owner: [email protected] Unsubscribe: https://edk2.groups.io/g/devel/unsub [[email protected]] -=-=-=-=-=-=-=-=-=-=-=-
