Extend the SMBIOS support for RD-N2-Cfg2 platform which is a quad-chip variant of the RD-N2 platform. Most the SMBIOS information is shared with the RD-N2 platform except for the number of the CPUs supported on the RD-N2-Cfg2 platform.
Signed-off-by: Pranav Madhu <[email protected]> --- Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c | 7 +++++-- Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 15 ++++++++++++--- Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 3 ++- 3 files changed, 19 insertions(+), 6 deletions(-) diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c index 17361f63359b..b7e2238fb39c 100644 --- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c +++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c @@ -5,7 +5,7 @@ Reference Design platforms. Type 1 table defines attributes of the overall system such as manufacturer, product name, UUID etc. - Copyright (c) 2021, ARM Limited. All rights reserved. + Copyright (c) 2021 - 2022, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Specification Reference: @@ -32,7 +32,8 @@ "RdV1\0" \ "RdV1Mc\0" \ "RdN2\0" \ - "RdN2Cfg1\0" + "RdN2Cfg1\0" \ + "RdN2Cfg2\0" typedef enum { ManufacturerName = 1, @@ -68,6 +69,8 @@ STATIC GUID mSmbiosUid[] = { {0xf2cded73, 0x37f9, 0x4ec9, {0xd9, 0xf9, 0x89, 0x9b, 0x74, 0x91, 0x20, 0x49}}, /* Rd-N2-Cfg1 */ {0xa4941d3d, 0xfac3, 0x4ace, {0x9a, 0x7e, 0xce, 0x26, 0x76, 0x64, 0x5e, 0xda}}, + /* Rd-N2-Cfg2 */ + {0xd2946d07, 0x8057, 0x4c26, {0xbf, 0x53, 0x78, 0xa6, 0x5b, 0xe1, 0xc1, 0x60}}, }; /* System information */ diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c index b554ee6dea58..b59172cf1cb9 100644 --- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c +++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c @@ -6,7 +6,7 @@ family, processor id, maximum operating frequency, and other information related to the processor. - Copyright (c) 2021, ARM Limited. All rights reserved. + Copyright (c) 2021 - 2022, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Specification Reference: @@ -27,7 +27,7 @@ #define SOCKET_TYPE_BASE 3 #define SOCKET_TYPE_NUM 1 #define PROCESSOR_VERSION_BASE (SOCKET_TYPE_BASE + SOCKET_TYPE_NUM) -#define PROCESSOR_VERSION_NUM 9 +#define PROCESSOR_VERSION_NUM 10 #define SERIAL_NUMBER_BASE (PROCESSOR_VERSION_BASE + PROCESSOR_VERSION_NUM) #define TYPE4_STRINGS \ "0x000\0" /* Part Number */ \ @@ -42,6 +42,7 @@ "Neoverse-V1\0" \ "Neoverse-N2\0" \ "Neoverse-N2\0" \ + "Neoverse-N2\0" \ "000-0\0" /* Serial number */ \ "783-3\0" \ "786-1\0" \ @@ -50,7 +51,8 @@ "78A-1\0" \ "78A-2\0" \ "7B7-1\0" \ - "7B6-1\0" + "7B6-1\0" \ + "7B7-1\0" typedef enum { PartNumber = 1, @@ -188,6 +190,13 @@ InstallType4ProcessorInformation ( mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount * FixedPcdGet32 (PcdChipCount); mArmRdSmbiosType4.Base.ThreadCount = CoreCount * FixedPcdGet32 (PcdChipCount); break; + case RdN2Cfg2: + mArmRdSmbiosType4.Base.CoreCount = CoreCount * FixedPcdGet32 (PcdChipCount); + mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount * FixedPcdGet32 (PcdChipCount); + mArmRdSmbiosType4.Base.ThreadCount = CoreCount * FixedPcdGet32 (PcdChipCount); + mArmRdSmbiosType4.Base.MaxSpeed = 3200; // Frequency in MHz + mArmRdSmbiosType4.Base.CurrentSpeed = 3200; // Frequency in MHz + break; case RdE1Edge: mArmRdSmbiosType4.Base.CoreCount = CoreCount / NEOVERSE_E1_THREADS_PER_CORE; mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount / NEOVERSE_E1_THREADS_PER_CORE; diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c index 02cfa6334deb..b71ce721e2e8 100644 --- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c +++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c @@ -6,7 +6,7 @@ implemented, cache configuration, ways of associativity and other information related to cache memory installed. - Copyright (c) 2021, ARM Limited. All rights reserved. + Copyright (c) 2021 - 2022, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Specification Reference: @@ -298,6 +298,7 @@ InstallType7CacheInformation ( mArmRdSmbiosType7[4].Base.Associativity = CacheAssociativity16Way; break; case RdN2: + case RdN2Cfg2: /* L1 instruction cache */ mArmRdSmbiosType7[0].Base.MaximumCacheSize2 = 64; // 64KB mArmRdSmbiosType7[0].Base.InstalledSize2 = 64; // 64KB -- 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#90780): https://edk2.groups.io/g/devel/message/90780 Mute This Topic: https://groups.io/mt/92015426/21656 Group Owner: [email protected] Unsubscribe: https://edk2.groups.io/g/devel/unsub [[email protected]] -=-=-=-=-=-=-=-=-=-=-=-
