On Tue, 17 Jan 2023 at 13:55, Rebecca Cran <rebe...@quicinc.com> wrote:
>
> I was under the impression that this is becoming a more standard format?
>

If this is not defined in an ARM spec somewhere, we shouldn't add it
to ArmPkg at this point.

> For example, the Neoverse N2 has AFF0 always 0 (it's not hyperthreaded),
> it puts the core ID in AFF1, the cluster ID in AFF2, but since it only
> has a single socket AFF3 is always 0. This differs from older cores
> where the core ID was in AFF0 and the cluster ID in AFF1.
>
> https://developer.arm.com/documentation/102099/0000/AArch64-registers/AArch64-identification-registers/MPIDR-EL1--Multiprocessor-Affinity-Register
>
> Am I mistaken?
>
> --
> Rebecca Cran
>
> On 1/17/23 02:53, Nhi Pham wrote:
> > Hi Rebecca,
> >
> > That's Ampere Altra Family specific MPIDR encoding. So, we could not
> > leverage the definitions in the ArmPkg/Include/Library/ArmLib.h.
> >
> > -Nhi
> >
> > On 1/13/2023 9:40 PM, Rebecca Cran wrote:
> >> On 1/12/23 21:21, Nhi Pham via groups.io wrote:
> >>
> >>> +//
> >>> +// MPIDR manipulation
> >>> +//
> >>> +#define AC01_GET_MPIDR(SocketId, ClusterId, CoreId) \
> >>> +          (((SocketId) << 32) | ((ClusterId) << 16) | ((CoreId) << 8))
> >>> +#define AC01_GET_SOCKET_ID(Mpidr)  (((Mpidr) & ARM_CORE_AFF3) >> 32)
> >>> +#define AC01_GET_CLUSTER_ID(Mpidr) (((Mpidr) & ARM_CORE_AFF2) >> 16)
> >>> +#define AC01_GET_CORE_ID(Mpidr)    (((Mpidr) & ARM_CORE_AFF1) >> 8)
> >>> +
> >>
> >> Ideally, this should go in ArmPkg/Include/Library/ArmLib.h, but I'm
> >> not sure how we should handle the older format where the the core was
> >> in the first 8 bits.
> >>


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