Firmware chooses to use 5-level paging when the platform using this firmware 
claims to boot 5-level paging OS only.

Usually, firmware uses 4-level paging to keep maximum OS compability.

Thanks,
Ray

> -----Original Message-----
> From: Gerd Hoffmann <kra...@redhat.com>
> Sent: Wednesday, May 10, 2023 5:18 PM
> To: devel@edk2.groups.io; pedro.falc...@gmail.com
> Cc: Andrew Fish <af...@apple.com>; Kinney, Michael D
> <michael.d.kin...@intel.com>; Ni, Ray <ray...@intel.com>; Ard Biesheuvel
> <a...@kernel.org>
> Subject: Re: [edk2-devel] Side effects of enabling PML5 in EFI
> 
> On Tue, May 09, 2023 at 06:24:03PM +0100, Pedro Falcato wrote:
> > Hi all,
> >
> > (+CC people vaguely related to the EFI spec, the PML5 implementation
> > and kernel EFI boot code)
> >
> > As a result of the latest 5-level paging patches, I've been looking
> > into how tiano supports PML5.
> > This raised a question: Doesn't enabling PML5 in-firmware break
> > compatibility with non-PML5-aware bootloaders and kernels?
> 
> kernels yes, bootloaders probably not (unless the bootloader not the
> kernel calls exitbootservices).
> 
> > So, how is any of this supposed to work?
> 
> edk2 is relatively late to the party, so with everybody else supporting
> 5-level paging already it might not be much of an issue in practice even
> though there is no compatibility handling (I know of) in edk2.
> 
> When running your operating system museum in virtual machines you have
> the option to just turn off 5-level paging support in the virtual cpu.
> 
> take care,
>   Gerd



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