Hello Ramkumar, Have you tried changing the -fw_cfg opt/ovmf/X-PciMmio64Mb,string=XXXXX parameter? Doesn't that help?
> On 20 Aug 2026, at 11:25, Ramkumar Santhanakrishnan via groups.io > <[email protected]> wrote: > > Hi > > I have a question about commit ecb778d0ac62560aa172786ba19521f27bc3f650, > which limits the MMIO window to 1/8 of the total physical address space. > For a guest with 46-bit physical addressing, this gives an 8 TB MMIO window. > We cannot increase the guest physical address width or move to 5-level paging > due to compatibility constraints. With newer GPUs (up to 512 GB VRAM each), 8 > TB may be insufficient for passthrough of 8 GPUs, mainly because each BAR > requires base address alignment. > We are evaluating increasing the MMIO window size. > Could you share the rationale for the 1/8 limit? > Do you see any concerns with changing it to 1/4, or making it configurable > from QEMU? > Thanks > Ramkumar > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#122112): https://edk2.groups.io/g/devel/message/122112 Mute This Topic: https://groups.io/mt/120843033/21656 Group Owner: [email protected] Unsubscribe: https://edk2.groups.io/g/devel/unsub [[email protected]] -=-=-=-=-=-=-=-=-=-=-=-
