#155: PCI Pin A needs to be routed to a real interrupt
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Reporter: JordanCrouse | Owner: rsmith
Type: defect | Status: new
Priority: blocker | Milestone: BTest-1
Component: linuxbios | Resolution:
Keywords: |
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Comment (by [EMAIL PROTECTED]):
In the Geode chipset, the PCI config registers don't really exist. They
are simulated by the VSA code, which takes SMI interrupts when you try to
access PCI config space for the 5536. At the hardware level, the
interrupt routing is done by MSR registers. I presume that the VSA
actually touches those MSR registers when it simulates access to PCI CFG
reg 0x5c.
There is a document that defines those simulated PCI CFG registers, but it
is in a restricted section of the AMD web site so I can't get a copy.
The MSRs that control interrupt routing are described in sections 5.8 and
6.9 of the 5536 spec.
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Ticket URL: <http://dev.laptop.org/ticket/155#comment:4>
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