On Thu, Oct 30, 2025 at 4:29 PM Austin Kim <[email protected]> wrote:
> Hello Lianbo, > > 2025년 10월 30일 (목) 오전 11:58, lijiang <[email protected]>님이 작성: > > > > Hi, Austin > > Thank you for the patch. > > On Wed, Oct 22, 2025 at 6:00 PM < > [email protected]> wrote: > >> > >> Date: Wed, 22 Oct 2025 11:46:19 +0900 > >> From: Austin Kim <[email protected]> > >> Subject: [Crash-utility] [PATCH] RISCV64: fix wrong information of PMD > >> and PTE - SA39(4K page) support > >> To: [email protected] > >> Cc: [email protected] > >> Message-ID: <aPhFe2nFOb1qlY8h@adminpc-PowerEdge-R7525> > >> Content-Type: text/plain; charset=us-ascii > >> > >> When running 'vtop address' command in RISC-V based vmcore, the base > address > >> without applying offset for PMD and PTE is displayed. This is not > correct > >> address for PMD and PTE. > >> > > > > This change looks good to me. So: Ack. > > Thank you for the positive feedback. > > > > > BTW: I haven't seen any similar changes on 4level_4k and 5level_4k, > isn't it necessary? Or can you also take a look? > > > > I agreed - The '4level_4k' and 5level_4k' need to be updated to print > the correct base address for PMD and PTE. > > Thank you for the confirmation, Austin. > I will send additional patches for '4level_4k' and '5level_4k' soon > after this patch is merged. Thank you again. > Good to know, thanks a lot. Lianbo > BR, > Austin Kim > >
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