Hi,
Just feedback about last mail for other schematics.
D, DDR SDRAM
From [1], the prototype is MT46V32M16P-5B:F TR, So a VDD = +2.6V
±0.1V, VDDQ = +2.6V ±0.1V (DDR400) can be achieved, let R62 = 2K Ohm
to be the VDD/VDDQ. The -5B device is backward compatible with all
slower speed grades. The voltage range of -5B device operating at
slower speed grades is VDD = VDDQ = 2.5V ± 0.2V. During prototype
stage, maybe can let R62 = 2K to test DDR400/PC3200(3-3-3) at 200MHz
clock rate or don't want test?
E, USB
Two USB-B connectors, no current limit protect circuit for each 0.5A
or just driven from +5V power source?
F, Video Input
1, CAPY2 should connect to C198's positive polarity, see p98 of
ADV7181BBSTZ
2, the GND of C225 & C226 must be digital GND.
3, Can add 33 ohm on SDA & SCLK?
Thanks,
Adam
[1] http://www.milkymist.org/wiki/index.php?title=Part_list#SDRAM
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