Hi Sebastien, Am Tuesday 16 March 2010 15:53:41 schrieb Sébastien Bourdeauducq: > FIRST PROBLEM > asm_do_IRQ is called from entry.S: > rcsr r1, IP > addi r2, sp, 4 > calli asm_do_IRQ > Therefore, it gets ALL interrupts (masked or not). We should AND register > IP with register IM.
yep. imho that should be done within the asm code. > SECOND PROBLEM (assuming problem 1 is fixed) > 1. let's assume IRQ0 and IRQ1 get asserted in the same clock cycle > 2. asm_do_IRQ is called with vec=3 (IRQ1|IRQ0) > 3. IRQ0 is masked > 4. generic_handle_irq(0) is called - this enables interrupts globally > 5. asm_do_IRQ is called again because of IRQ1 and the interrupts being re- > enabled > 6. IRQ0 was masked by the first ISR run and therefore is not processed, but > IRQ1 was not and generic_handle_irq(1) is called > 7. second ISR run is complete, control returns to the first ISR, > generic_handle_irq(0) completes > 8. the first ISR runs again generic_handle_irq(1), which is incorrect > other linux ports pass only one single irq number to do_IRQ(). What about the following steps: 1. interrupt vector gets called 2. save regs 3. r2 <- IM & IP 4. find position of first bit set in r2, store it in r1 (4a. r2 <- pt_regs) 5. mask irq 6. call do_IRQ (which only takes one irq number) 7. ack irq 8. unmask irq 9. restore regs 10. eret Processing only one interrupt at a time should avoid the second problem, mentioned above. do_IRQ() just calls irq_enter/exit generic_handle_irq. > Do you see a particular reason for using the lm32_current_irq_mask "cache", > or is it just Theobroma's programmers being stupid? Nope, maybe it had something to do with that IPIPE thing. Imho it should be removed. Btw the theobroma's original code just decoded one interrupt at a time. -- wkr Michael _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkym...@freenode Webchat: www.milkymist.org/irc.html Wiki: www.milkymist.org/wiki
