Hi, >> The digital core of the ADV7181B can be shut down by using a pin >> (PWRDN) and a bit (PWRDN). U21's pin30 PWRDN_N is always at HIGH.The >> PDBP controls which of the two has the higher priority. By default, >> the pin (PWRDN) is given priority. This allows the user to have the >> ADV7181B powered down by default. So if you set PDBP bit to 1 >> immediately though I2C after configuring fpga I/O firstly, we can know >> if over current high again. --> this can use # 1 or #4 to test. > > I cannot configure the FPGA on a board that has developed the short-circuit > condition. The 3.3V supply fails and the FPGA is disabled until I remove the > video chip.
I forgot one thing that: Do you think that is it possible that setting PDBP bit to "1" before(30s) current jumping into high current? If yes, maybe we can know if over-current happened. The U21's P[15:8] is only pad without any traces on pcb. I measured bare pcb without errors even P[7:0] connected to fpga' pad. Hope this info helps if still same status occurred after rework later. Well...it indeed needs time. Thanks, Adam _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkym...@freenode Webchat: www.milkymist.org/irc.html Wiki: www.milkymist.org/wiki
