On Saturday 17 July 2010 09:59:49 Yanjun Luo wrote: > 1. Remove JTAG_OE signal, always enable the buffer.
According to the TXB0104 datasheet: "3-state output-mode enable. Pull OE low to place all outputs in 3-state mode. Referenced to VCCA." so you should pull (or directly connect) OE to 3.3V instead of ground - right now, the buffer is always disabled. > 2. Add TVS on USB and serial port. > 3. Add 1M and 4.7nF/250V resistor and capacitor in parallel to USB > shield. Ok. There is another (subtle) problem: the TXB0104 recommends all pull-up or pull- down resistors it's connected to to be > 50K (datasheet p.11). The FPGA has internal pull-up resistors on JTAG pins (UG380 p.56) that can provide currents between 120uA and 350uA (DS162 p.4). This corresponds to a "resistor" between 20K and 7K, which would upset the TXB0104. Can you find a level shifter with higher DC drive strength? It doesn't need to be bidirectional, all JTAG signals are one-way. Thanks, Sébastien _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkym...@freenode Webchat: www.milkymist.org/irc.html Wiki: www.milkymist.org/wiki
