Hi Sebastien, For some reason the JTAG pods that were just manufactured show up in > full speed (12MBps) mode instead of high speed (480Mbps). > > This is quite puzzling, since the cables from Yanjun Luo work correctly > in high speed with the capacitors and resistors on the USB lines removed > - and the schematics of the latest cables should only reflect this one > modification. > > This doesn't have to do with the EEPROM contents. The problem is still > present when the EEPROM is disabled by shorting pins 1 and 5 and the > FTDI chip defaults to its built-in configuration: the new cable will be > full speed, while the old one will be high speed. > > Most likely it is a production or schematics mistake that messes up the > FTDI chip environment and makes it fail to enter high speed... > > Note that the symptom is different from the initial problem (with the > resistors and capacitors on the USB lines). Instead of starting at high > speed and then having Linux hosts switch to full speed because of the > transmission errors induced by the extra parts (other OSes react > differently), the cable does not go to high speed at all. >
It's really strange, the update version I only remove the resistors and capacitors, it should not impact the functions at all. Also as you said, it's not because of something make the bus error like last time, it looks like the chip only works in full speed. Hi Wolfgang, Can you send me one to check it? Note, it's almost Chinese new year, I'll leave Beijing before the end of this month. I'll back Beijing after it, about Feb 10th. Regards, Yanjun Luo.
_______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode Twitter: www.twitter.com/milkymistvj Ideas? http://milkymist.uservoice.com
