On Mon, 2011-03-07 at 09:33 -0800, Richard Sharpe wrote: > Speaking of which, do any of the tool sets support things like > > #ifdef SYNTHESIS_TOOL == "XST" > > or > > #ifdef TARGET_FPGA == "Xilinx SPARTAN 3E"
Atm the LLHDL Verilog front-end lacks a preprocessor (among other things), so a good and productive way to get this feature in would be to take care of said preprocessor yourself and send us some code :) Btw the LLHDL list is ll...@lists.milkymist.org Thanks, Sébastien _______________________________________________ http://lists.milkymist.org/listinfo.cgi/devel-milkymist.org IRC: #milkymist@Freenode Twitter: www.twitter.com/milkymistvj Ideas? http://milkymist.uservoice.com
