This register is required by the GDB stub.
---
cores/sysctl/rtl/sysctl.v | 9 +++++++++
software/include/hw/sysctl.h | 1 +
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/cores/sysctl/rtl/sysctl.v b/cores/sysctl/rtl/sysctl.v
index 4a10689..aadda7d 100644
--- a/cores/sysctl/rtl/sysctl.v
+++ b/cores/sysctl/rtl/sysctl.v
@@ -99,6 +99,11 @@ sysctl_icap icap(
);
/*
+ * Debug scrachpad register
+ */
+reg [7:0] debug_scratchpad;
+
+/*
* Logic and CSR interface
*/
@@ -126,6 +131,8 @@ always @(posedge sys_clk) begin
compare1 <= 32'hFFFFFFFF;
hard_reset <= 1'b0;
+
+ debug_scratchpad <= 8'd0;
end else begin
timer0_irq <= 1'b0;
timer1_irq <= 1'b0;
@@ -168,6 +175,7 @@ always @(posedge sys_clk) begin
4'b1001: compare1 <= csr_di;
4'b1010: counter1 <= csr_di;
+ 4'b1100: debug_scratchpad <=
csr_di[7:0];
// 1101 is ICAP and is handled
separately
// 1110 is capabilities and is read-only
4'b1111: hard_reset <= 1'b1;
@@ -191,6 +199,7 @@ always @(posedge sys_clk) begin
4'b1001: csr_do <= compare1;
4'b1010: csr_do <= counter1;
+ 4'b1100: csr_do <= debug_scratchpad;
4'b1101: csr_do <= icap_ready;
4'b1110: csr_do <= capabilities;
4'b1111: csr_do <= systemid;
diff --git a/software/include/hw/sysctl.h b/software/include/hw/sysctl.h
index 8f33526..19accb6 100644
--- a/software/include/hw/sysctl.h
+++ b/software/include/hw/sysctl.h
@@ -35,6 +35,7 @@
#define TIMER_ENABLE (0x01)
#define TIMER_AUTORESTART (0x02)
+#define CSR_DBG_SCRATCHPAD MMPTR(0xe0001030)
#define CSR_ICAP MMPTR(0xe0001034)
#define ICAP_READY (0x01)
--
1.7.2.3
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