Hi,

To real know how a DVI compliant monitor work with host system,
i've read this:
[1] http://www.ddwg.org/lib/dvi_10.pdf

I listed some summaries from it:

1). "Plug and play through hot plug detection, EDID, DDC2B."
2). "If the DVI compliant monitor was not present during the boot process,
the Hot Plug Detection mechanism exists to allow the system to determine
when a DVI compliant monitor has been plugged in. After the Hot Plug-In
event the system will query the monitor using the DDC2B interface and
enable the T.M.D.S. link if required."
3). "HPD is a system level function requiring industry specifications at
both hardware and software levels."
4). Also on section 2.2.9.1, "System Hot Plugging Requirements";
     etc.
5) page 23, (HPD) : "Signal is driven by monitor to enable the system to
identify the presence of a monitor"
    and +5V Power : " +5 volt signal provided by the system to enable the
monitor to provide EDID data when the monitor circuitry is not powered."
6) page 17, "The monitor must provide a voltage of greater than +2.4V volts
on the Hot Plug Detect (HPD) pin of the connector only when the EDID data
structure is available to be read by the host. When the EDID data structure
can not be read then voltage on the HPD pin must be below +0.4 volts."
"Implementation Note: As an example for hot plug support, a simple monitor
implementation of HPD support could be a pull up resistor to the EDID power
supply."

Lars also gave comments in #milkymist:
[2] http://en.qi-hardware.com/mmlogs/milkymist_2012-01-20.log.html#t13:59
"DVI should have a HDP (hotplug detect pin) which is pulled high if a
connector is inserted"
I guessed that Lars has seen codes somewhere and given hint. Thanks. ;-)

Hardware implement seems being vividly portrayed: HPD pin @ high while
monitor attachment, @ low while monitor removal.
But how get there with monitor?

After surfed like:
[3]  http://www.eefocus.com/data/09-03/53113_1236575263/File/1236754873.pdf
It's briefly mentioned but same idea with 6).

[4]  http://www.digilentinc.com/Data/Products/ATLYS/Atlys_C2_sch.pdf
The ATLYS shows: HDMI OUT, J2.HPD NC., it's weird, don't understand. its
HDMI IN, J3.HPD connects a 1K Ohm to 5V normally when power on., PMODA.HPD
connects to a jumper then 5V, not sure it's in open or close normally. The
HDMI IN with 1 pull-up resistor which is exactly same idea from like 6) be
as design on monitor side.

[5]  http://www.compon-tech.cn/Product%20EMC%20design/DVI%20EMC%20design.pdf
It's a proposed DVI out came from EMC solution vendor, HPD pin marks a net
named HPD_C which must be as input path to its sysem, also with a TVS to
eliminate external discharge. Be good to know that meet EMC compliant,
there's common choke in series each differential pair but clock pair. A
bead in series on 5V. It's a good example but not all protective parts we
must to follow.

[6]  http://www.dzsc.com/data/html/2009-6-15/76847.html
This lets me fully understood how they{ from 1) to 6) } work out. Although
it's in Chinese, the left small block is host system, the right block with
dotted line is monitor ( includes EDID Eeprom there. ). With this
introduction, it meets all items above that i didn't fully understand when
read many spec.
so use cases:

a) monitor removal and its +5V is OFF,
    of course host side, no any voltage picks up on HPD pin, this case is
mostly when your monitor's power switch is OFF.
    No EDID parameters can be accessed by host surely.

b) monitor attachment and its +5V is still OFF,
    host pin14 DDCA5V passes through R2, R1, then backloop to host HPD pin,
an over +2.4V occurrs, do rest s/w. Eeprom's power supplies from host
system. It's case like even your DVI monitor's power switch is OFF but host
system can still read EDID to know your monitor's specifications.

c) monitor attachment and its +5V is ON,
    Eeprom's power supplies by both DDCA5V came from host and monitor's
+5V, so it's the case happened as usual.

So I'll do works on M1R4:

s1, let's connect J17.HPD pin to one un-used pin on fpga directly.
s2, add one same varistor EZJ-Z080010 on J17.HPD pin and connect to GND.
s3, although there's no like ours R156 1M Ohm & C135 4.7nF network to
protect DVI connector shield to gnd like [6] which they are all directly
connect to system ground. I'd prefer to keep ours. If there's problems in
the end, we can just short them by soldering.
s4, if add common choke ? need more info though.

Any comments ?
Thanks,
- adam
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