Yo Hal!

On Wed, 21 Sep 2016 19:24:31 -0700
Hal Murray <hmur...@megapathdsl.net> wrote:

> Nice work.  Thanks.

I wish it brought more clarity...

> Would you please remind us about what the PPS setups on those systems
> are. (I think you said the Xeon has a USB setup.)


Notes on the system config, and links to the ntp.conf are on those pages.

> And what do the column headings really mean?

Those match the headings on the ntpviz pages, links just above.

> Do you have a recipe for generating that data?  I expect it comes
> from ntpviz, but what do I type?  Is there anything interesting on
> the graphs? ...

I just copy the numbers off the graphs.  I think I'll need to automate
it some more.

> For things like this, there is usually a tradeoff.  If you sample too
> close together (short poll) the errors are dominated by the accuracy
> of the measurement.  If you sample far apart, the underlying clock is
> changing while you are measuring it.  That leads to the classic V
> shape for ADEV graphs. The bottom of the V is usually the best place
> to measure.

Yeah, I'm just surprised at how different the Pi3 and the Xeon are.

> For a good PPS (GPIO or real serial port) that works out to be 1
> second or less.

SO far I'm seeing 4s as the best on the Pi3.

> For PPS over USB things get messy because the error may not be
> Gaussian.  If you don't hit one of the ugly hanging-bridge cases,
> more measurements help to average out the noise.

Yeah, not even started to look at that yet.  What I see is the
USB phase locks to the PPS and the results are 'too good'.

Gary E. Miller Rellim 109 NW Wilmington Ave., Suite E, Bend, OR 97703
        g...@rellim.com  Tel:+1 541 382 8588

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