On 12/14/18 11:52 AM, Joel Sherrill wrote: > > The tsim bitmap format is easy. If it produces that there will be no > modifications. > > > The ability to control the trace file name would be nice. The > rtems-test tool > runs the sis simulator in parallel on the available cores and we > now have a > number of executables in the same directory. > > > +1 > > The riscv news and move of the simulator is great news. > > Moving grlib is also useful. We are working on an arm bsp. > > I will then proceed in four steps:
1. Provide a sis-mp patch for gdb-8.0.1 that goes on top of the existing sis patches. This can be quickly integrated in the current RSB system and used for SMP testing. 2. Move to gdb-8.2 or current, which has RISCV support. I will move the simulator to sim/sis and provide both SPARC and RISCV emulation, depending on target selection. 3. Add coverage support with format to be decided. 4. Try to integrate my RISCV/GRLIB bsp and run it on sis. Jiri.
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