Rob Taylor writes: > > Has anyone sucessfully run the chips 69030 driver on powerpc > > based systems? > > I'm trying to get it running on a custon 7410 based board with two 69030's > > on,a nd i;'m seing soem off things: > > > > my /proc/pci gives me that: > > Bus 0, device 18, function 0: > > VGA compatible controller: PCI device 102c:0c30 (Chips and > > Technologies) > > (rev 97). > > IRQ 18. > > Non-prefetchable 32 bit memory at 0xfa000000 [0xfaffffff]. > > Bus 0, device 19, function 0: > > VGA compatible controller: PCI device 102c:0c30 (Chips and > > Technologies) > > (rev 97). > > IRQ 18. > > Non-prefetchable 32 bit memory at 0xfb000000 [0xfbffffff]. > > > > at the moment i'm just attempting single head setup on device 18, > > however i > > find cPtr->PciInfo->memBase[0] is 0xff000000 when calulating > > cPtr->FbAddress (in chipsPreInitHiQV) , rather than 0xfa000000! Does any > > know any reason why xf86GetPciInfoForEntity would return incorrect > > information, or have i got the wrong end of the stick? > > > well I now know why i get 0xff000000 for the set up device - its MBASE0 is > 0x0000000 when we do xf86scanpci, and PCINONSYSTEMCLASSES(baseclass, > subclass) is true hence pciCheckForBrokenBase gets called, which will set > MBASE0 to 0xffffffff, and as only the top byte is writable (16Meg chunks) > MBASE0 becomes 0xff000000. > > not that this seems to help me much. i'm just more confused now!! why on > earth would mbase0 be 0, if its in use and /proc says the device's memory is > at 0xfa00000???! > > really just posting this here incase anyone else ever wants to know... =) >
Can you add some code to xf86scanpci() to find out why it's 0? On PPC PCI config space data gets obtained thru the kernel, therefore it is even harder to understand. Also could you please run 'scanpci -v'? Egbert. _______________________________________________ Devel mailing list [EMAIL PROTECTED] http://XFree86.Org/mailman/listinfo/devel
