On Thursday, 29 de December de 2011 12.12.53, Thiago Macieira wrote:
> 1) immediately disable the use of MMX technology registers in 64-bit mode.
> Turns out that this is already supported in the code because MSVC in 64-bit
> mode does not offer MMX support. We only need to apply this to GCC and ICC.
>
> 2) apply the same for 32-bit builds targetting recent CPUs (e.g., when the
> user passes -march=). We can add #pragma GCC target("fpmath=sse")
>
> 3) compile the plain C++ code in SSE mode with -mfpmath=sse so that, at
> runtime, we can choose that instead of MMX.
>
> 4) rewrite all the past code, where applicable, to use SSE and SSE2 (or
> better), but in SIMD mode. This code can also be built with VEX prefixes.
>
> 5) drop the MMX code.
>
> We can do 1-5, 1+4+5 or straight on 4 and 5 only.
I'm thinking the whole architecture might need to change:
gcc $ make .obj/release-shared/qdrawhelper.o |& grep -c LOOP\ VECTORIZED
112
icc $ make .obj/release-shared/qdrawhelper.o |& grep -c LOOP\ WAS\ VECTORIZED
107
This file alone has a lot of vectorisation possibilities, for things I doubt
we'll ever even consider writing vector code using intrinsics. Yet there are
probably big performance improvements possible. I recommend then the following
actions, instead of what I had recommended before:
1) Drop the MMX code and the 3dNow! extensions now
2) Compile qdrawhelper.cpp once, normally, no change to compiler flags
3) If the compiler flags from the user do not already include -msse2, compile
it *again* with -msse2; the same applies for -mfpu=neon on ARM.
4) If the compiler flags don't already include -mavx, do it *again* with -mavx.
5) Select a few operations that might benefit from SSE3 or SSSE3
implementations on top of the SSE2 ones (my guess is it's only
blend_argb32_on_argb32)
--
Thiago Macieira - thiago.macieira (AT) intel.com
Software Architect - Intel Open Source Technology Center
Intel Sweden AB - Registration Number: 556189-6027
Knarrarnäsgatan 15, 164 40 Kista, Stockholm, Sweden
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