On Sun, Jul 15, 2012 at 04:24:16AM +0800, Linus Walleij wrote: > On Fri, Jul 6, 2012 at 11:09 AM, Dong Aisheng <[email protected]> wrote: > > > From: Dong Aisheng <[email protected]> > > > > The General Purpose Registers (GPR) is used to select operating modes for > > general features in the SoC, usually not related to the IOMUX itself, > > but it does belong to IOMUX controller. > > We simply provide an convient API for driver to call to set the general > > purpose > > register bits if needed. > > > > Signed-off-by: Dong Aisheng <[email protected]> > > I have an overall objection to this: > > I have no idea at all about what's going on, and why this belongs in the pin > control subsystem. On the contrary, from the commit description it seems to > *not* belong in this subsystem at all. > Yes, it's just from hw point of view, these GPR registers are included in IOMUXC block. But as the spec says in my commit messages, most of what they do are not related to IOMUX itself. So i would agree it doesn't belong to pinctrl subsystem if we can find a better place.
> So: exactly what does this register do, and which are the consumers? > They're used for general settings for different modules like DMA, USB, PCIe, IPU... Regards Dong Aisheng _______________________________________________ devicetree-discuss mailing list [email protected] https://lists.ozlabs.org/listinfo/devicetree-discuss
