For RMII mode operation in 100Mbps, the CPSW needs to set the IFCTL_A / IFCTL_B bits in the MACCONTROL register.
Signed-off-by: Daniel Mack <[email protected]> Cc: Mugunthan V N <[email protected]> Cc: Vaibhav Hiremath <[email protected]> Cc: David S. Miller <[email protected]> --- drivers/net/ethernet/ti/cpsw.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 3d7594e..d88dbfa 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -386,6 +386,12 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave, mac_control |= BIT(7); /* GIGABITEN */ if (phy->duplex) mac_control |= BIT(0); /* FULLDUPLEXEN */ + + /* set speed_in input in case RMII mode is used in >10Mbps */ + if (phy->speed > 10 && slave->slave_num < 2 && + phy->interface == PHY_INTERFACE_MODE_RMII) + mac_control |= BIT(15 + slave->slave_num); + *link = true; } else { mac_control = 0; -- 1.7.11.4 _______________________________________________ devicetree-discuss mailing list [email protected] https://lists.ozlabs.org/listinfo/devicetree-discuss
