On Tue, Jun 18, 2013 at 08:44:30PM +0200, Sebastian Hesselbarth wrote: > On 06/18/2013 08:39 PM, Arnd Bergmann wrote: > >On Tuesday 18 June 2013, Sebastian Hesselbarth wrote: > >>Also allows you to have up to 40b offset, which might be important > >>with LPAE enabled. > > > >Not with the current generation I think, since the mbus windows are > >32 bit only, but it would avoid having to come up with a new format > >for a potential future-generation mbus that has wider address. > > Yeah, I also recall Thomas or Gregory mention a 32b limitation in > remap windows. But we don't need to waste addresses here > > And even if SIAA0000 is a concern because there may be target id >15 > someday, we can still have IIAASS00 instead of IIAA00SS. I guess > LPAE will not rise above 40b quickly ;)
S = 0 means 4 bit I, 8 bit A S = F means special S = 1 could mean 16 bit I, etc , etc Yes, we could define things as 'SIAAoooo oooooooo' But remember 'o' is the offset within the window, it is not related to LPAE. To need > 32 bits 'o' you need to have windows > 4G in size. The only thing that could possibly do that is PCI-E, and it is all special anyhow.. The mbus top level ranges remap already supports >4G locations for the windows, even though current hardware cannot do that. Jason _______________________________________________ devicetree-discuss mailing list devicetree-discuss@lists.ozlabs.org https://lists.ozlabs.org/listinfo/devicetree-discuss
