The SoC supports 2 DCAN nodes. Add them.
Signed-off-by: Roger Quadros <[email protected]>
---
arch/arm/boot/dts/dra7.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5fd52cd..9d84846 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
+ d_can0 = &dcan1;
+ d_can1 = &dcan2;
};
timer {
@@ -1270,6 +1272,26 @@
ti,irqs-skip = <10 133 139 140>;
ti,irqs-safe-map = <0>;
};
+
+ dcan1: can@481cc000 {
+ compatible = "ti,dra7-d_can1";
+ ti,hwmods = "dcan1";
+ reg = <0x4ae3c000 0x2000>;
+ syscon-raminit = <&dra7_ctrl_core 0x558>;
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&dcan1_sys_clk_mux>;
+ status = "disabled";
+ };
+
+ dcan2: can@481d0000 {
+ compatible = "ti,dra7-d_can2";
+ ti,hwmods = "dcan2";
+ reg = <0x48480000 0x2000>;
+ syscon-raminit = <&dra7_ctrl_core 0x558>;
+ interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sys_clkin1>;
+ status = "disabled";
+ };
};
};
--
1.8.3.2
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