On Mon, Dec 07, 2015 at 06:49:43PM +0000, Sudeep Holla wrote:
>
> On 07/12/15 18:24, Geert Uytterhoeven wrote:
> >+ L2_CA57: cache-controller@0 {
> >+ compatible = "cache";
> >+ arm,data-latency = <4 4 1>;
> >+ arm,tag-latency = <3 3 3>;
>
> Interesting, only PL2xx/3xx cache controller driver reads this from the
> DT and configures the controller. The integrated L2 found in
> A15/A7/A57/A53 needs doesn't make use of these values from the DT.
These properties seem to be from l2cc.txt, which really only corresponds
to PL210/PL220/PL310 (and variants) and isn't as generic as it sounds.
I don't see that these are necessary at all.
Thanks,
Mark.
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