On Tuesday, 12 July 2016 at 15:24:29 UTC, Guillaume Chatelet wrote:
On Tuesday, 12 July 2016 at 13:23:46 UTC, Ilya Yaroshenko wrote:
On Tuesday, 12 July 2016 at 12:46:26 UTC, Guillaume Chatelet wrote:
On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote:
Hello :-)

`cpuid` package is core.cpuid analog.
It would be used by future D BLAS implementation.

Hey Ilya,

Quick question: where do the data come from/how reliable do you think they are?

Hello Guillaume,

The data come from CPUID x86/x86_64 instruction.
I have fixed bugs for AMD yesterday. Information for Intel and AMD processors should be reliable. But I am not sure about Cache and TLB information for virtual machines and other vendors. You can use cpuid.x86_any._cpuid [1] to get any information that is not presented.

[1] http://docs.cpuid.dlang.io/latest/cpuid_x86_any.html#._cpuid

Thx Ilya,

I was discussing this a few colleagues. I'm quoting one of them here with his permission:

"It doesn't seems that a userland library like this has any possibility to solve the root problem on Android/ARM. It's a twofold problem:

1. On ARM, the registers containing CPU identification and cache structure information, are privileged. See:
etc... (more such registers listed in the left pane on that page)

Thus it is up to the operating system to expose this information to userspace. That takes us to the second part of the problem:

2. As far as I know, Android does not expose either CPU identification or cache structure information to userspace.

Please do correct me if I'm wrong and this library found a way around that --- but from a cursory look at the cpuid library code, it does not have an ARM implementation at the moment?"

On Linux/ARM, Linux/PPC, etc. you have to use getauxval(): https://github.com/dlang/druntime/blob/master/src/core/sys/linux/sys/auxv.d
See https://lwn.net/Articles/519085/ for background information.


Reply via email to