Summary: Add support for 64bit and 256bit vectors
--- Comment #0 from Manu <turkey...@gmail.com> 2012-03-01 00:51:26 PST ---
Many SSE opcodes interact with MMX regs, that is, 128bit vectors interacting
with 64bit vectors.
We currently have no expression of the MMX regs in the language.
Consider adding float2, short4, etc?
AVX is common now, has 256bit regs, I'd also like to start making use of this
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