On 6/30/2014 11:58 PM, "Ola Fosheim Grøstad"
<[email protected]>" wrote:
On Monday, 30 June 2014 at 22:58:48 UTC, Walter Bright wrote:
Wow. Fortunately, there's a switch
http://publib.boulder.ibm.com/infocenter/cellcomp/v101v121/index.jsp?topic=/com.ibm.xlcpp101.cell.doc/proguide/spu_sp_diffs.html
so it'll work correctly.
That's the same link I provided, but I presume the compiler switch kills
performance?
Click on "compiling for strict IEEE conformance"
You have the same with ARM processors. NEON (SIMD) instructions are
not IEEE754 compliant. VPF is almost compliant, but does not support subnormal
numbers and flush them to zero. Which can be a disaster…
It wouldn't be any different if the D spec says "floating point is, ya know,
whatevah". You can't fix stuff like this in the spec.
So basically, floating point is not portable unless you give up performance or
check all expressions with worst case analysis based on deficiencies on all
current platforms.
As I've posted before, nobody's FP code is going to work on such platforms out
of the box even if the spec is accommodating for it. The whole point of IEEE 754
is to make portable FP code possible.
Besides, Java and Javascript, for example, both require IEEE conformance.
