On 1/12/2012 12:13 PM, Norbert Nemec wrote:
A type v128 would not provide the necessary information for the compiler to
produce the correct mov statements.
There definitely must be a float4 and a double2 type to express these semantics.
For integers, I am not quite sure. I believe that integer SSE commands can be
mixed more so a single 128bit type would be sufficient.
Considering these hardware details of the SSE architecture alone, I fear that
portable low-level support for SIMD is very hard to achieve. If you want to
offer access to the raw power of each architecture, it might be simpler to have
machine-specific language extensions for SIMD and leave the portability for a
wrapper library with a common front-end and various back-ends for the different
architectures.
That's what we're doing for D's SIMD support.
Although the syntax will support any vector type, the semantics will constrain
it to what works for the target hardware. Manu has convinced me that to emulate
vector types that don't have hardware support is a very bad idea, because then
naive users will assume they'll be getting hardware performance, but in reality
will have truly execrable performance.
Note that gcc does do the emulation for unsupported ops (like some of the
multiplies). Take a gander at the code generated - instead of one instruction,
it's a page of them. I think this will be an unwelcome surprise to the
performance minded vector programmer.
Note that explicit emulation will be possible, using D's general purpose vector
syntax:
a[] = b[] + c[];
