On Dec 10, 2007 3:26 PM, George Nychis <[EMAIL PROTECTED]> wrote: > In benchmark_rx.py, the samples are unmodified up to the channel filter, > correct?
All samples go through the FPGA's CORDIC and then through the CIC filter, possibly the halfband filter depending on your configuration. What phase increment is being set on the CORDIC? This should be the equivalent of -10MHz to shift the input samples down to 0Hz within the FPGA. > I see, this makes sense. > > At this point, I'm not really sure what's going on. I guess we will dig > around the FPGA code, but I still don't understand how we can properly > receive and plot the sine wave if it were broken. Are you doing any frequency translations with the tone, or are you sending a 2MHz tone and receiving a 2MHz tone? Brian _______________________________________________ Discuss-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
