And what about the new RFNoC and GRC to be run on an E310?

>From Ettus site we are told that "RFNoC has been integrated into UHD for our
third generation USRP SDRs (X300-series, E300-series, and future devices)".
Furthermore Ettus site shows some examples where RFNoC blocks are used under
GRC, which is a GUI environment (but they are run on an X series HW...).

So the new question is: what is the right methodology to make designs under
GRC to be run under an E310? What about initial testing steps (especially if
you want to use RFNoc)?

About RFNoC I could imagine a step-wise approache where I prepare the Python
with GRC (where the RFNoC OOT modules are installed) and then I run it on
the E310 (where the RFNoC non-default FPGA configuration is installed). But
what about testing such design? "If your flow graph doesn't use graphical
sinks" how can you test your design? The only way out I can think of is to
rely on data saved to file to be analysed in a post-processing step.

Needless to say that comments are welcome...

TIA!

BR,
Maurizio.



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