Mark Lanctot;381660 Wrote: 
> Huh!  Out of interest since Sean's responded to this thread, what did
> the CPLD in SLIMP3 and presumably the SB1 do?  Just run firmware?
> 

These xc95... CPLDs are very small logic devices relative to most of
the parts that Xilinx makes. They are not processors running software,
they are actually just an array of simple logic gates. I use them
mostly for glue logic, for example inverting or delaying a signal,
selecting between different clock sources, converting i2s to left
justified, IO multiplexing, etc.

SLIMP3 has the largest CPLD of any of the products - it is has a DMA
controller implemented in the CPLD, in order to offload from its tiny
CPU the work of pumping audio data from the ethernet chip to the buffer
RAM and then serializing it out to the decoder. 

> 
> The hardware comparison wiki page:
> 
> http://wiki.slimdevices.com/index.php/HardwareComparison
> 
> shows that the decoder in SLIMP3 was a Micronas MAS3507D, in SB1 a
> Micronas MAS3539, but that in SB2 and later was software-based. 
> Presumably this is SlimDSP, and I understood this was done in the CPLD
> so that new codecs could be added.

the CPLDs in each o the products are:

SLIMP3: xc95144 (DMA controller, SRAM interface, bitstream output to
decoder)
Squeezebox1: none (relatively fast CPU connected directly to decoder -
did not need DMA or glue)
Squeezebox2, 3, Boom, Receiver: xc9536xl (clock selection and s/pdif
encoding - more features for handling raw PCM properly)
Transporter: xc9572xl, similar functions as SB2/3, but a lot more of
them eg s/pdif input


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