On Tue, May 9, 2017 at 8:18 PM, Eric Anholt <[email protected]> wrote: > Linus Walleij <[email protected]> writes: > >> On Mon, May 8, 2017 at 9:33 PM, Eric Anholt <[email protected]> wrote: >> >>> This is required for the panel to work on bcm911360, where CLCDCLK is >>> the fixed 200Mhz AXI41 clock. The rate set is still passed up to the >>> CLCDCLK, for platforms that have a settable rate on that one. >>> >>> v2: Set SET_RATE_PARENT (caught by Linus Walleij), depend on >>> COMMON_CLK. >>> >>> Signed-off-by: Eric Anholt <[email protected]> >> >> Reviewed-by: Linus Walleij <[email protected]> > > Thanks. Waiting on an ack from clock folks, then we'll be ready to go, > I think.
Mike/Stephen? It would be nice to have this queued in -next quite early in the v4.13 development cycle, so I can start looking into migrating the rest of the old fbdev users to this. BCM911360 seems like some oddity, there is not even a pictur of it online, but I guess it's a cool little gadget :) Yours, Linus Walleij _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
