tree:   git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head:   f1182e58cded6542924c9ae92c1e9cf4da9c73d3
commit: 53ebbecb43fc075cedd5057e07adafd112e881ca [1566/1583] drm/amd/pp: 
Implement voltage regulator config on CI
reproduce:
        # apt-get install sparse
        git checkout 53ebbecb43fc075cedd5057e07adafd112e881ca
        make ARCH=x86_64 allmodconfig
        make C=1 CF=-D__CHECK_ENDIAN__


sparse warnings: (new ones prefixed by >>)

   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1440:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1441:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
SpllSpreadSpectrum @@ got ed int SpllSpreadSpectrum @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1441:9: expected 
unsigned int SpllSpreadSpectrum
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1441:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1442:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
SpllSpreadSpectrum2 @@ got ed int SpllSpreadSpectrum2 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1442:9: expected 
unsigned int SpllSpreadSpectrum2
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1442:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1443:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
CcPwrDynRm @@ got ed int CcPwrDynRm @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1443:9: expected 
unsigned int CcPwrDynRm
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1443:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1444:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
CcPwrDynRm1 @@ got ed int CcPwrDynRm1 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1444:9: expected 
unsigned int CcPwrDynRm1
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1444:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1455:57: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MinVddci @@ got ed int MinVddci @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1455:57: expected 
unsigned int MinVddci
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1455:57: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1457:57: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MinVddci @@ got ed int MinVddci @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1457:57: expected 
unsigned int MinVddci
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1457:57: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1461:48: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MinMvdd @@ got ed int MinMvdd @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1461:48: expected 
unsigned int MinMvdd
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1461:48: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1484:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
DllCntl @@ got ed int DllCntl @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1484:51: expected 
unsigned int DllCntl
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1484:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1486:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MclkPwrmgtCntl @@ got ed int MclkPwrmgtCntl @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1486:51: expected 
unsigned int MclkPwrmgtCntl
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1486:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1488:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MpllAdFuncCntl @@ got ed int MpllAdFuncCntl @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1488:51: expected 
unsigned int MpllAdFuncCntl
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1488:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1490:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MpllDqFuncCntl @@ got ed int MpllDqFuncCntl @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1490:51: expected 
unsigned int MpllDqFuncCntl
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1490:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1492:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MpllFuncCntl @@ got ed int MpllFuncCntl @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1492:51: expected 
unsigned int MpllFuncCntl
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1492:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1494:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MpllFuncCntl_1 @@ got ed int MpllFuncCntl_1 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1494:51: expected 
unsigned int MpllFuncCntl_1
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1494:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1496:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MpllFuncCntl_2 @@ got ed int MpllFuncCntl_2 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1496:51: expected 
unsigned int MpllFuncCntl_2
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1496:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1498:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MpllSs1 @@ got ed int MpllSs1 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1498:51: expected 
unsigned int MpllSs1
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1498:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1500:51: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
MpllSs2 @@ got ed int MpllSs2 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1500:51: expected 
unsigned int MpllSs2
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1500:51: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1509:46: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
ActivityLevel @@ got short ActivityLevel @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1509:46: expected 
unsigned short ActivityLevel
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1509:46: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1553:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
VclkFrequency @@ got ed int VclkFrequency @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1553:17: expected 
unsigned int VclkFrequency
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1553:17: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1554:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
DclkFrequency @@ got ed int DclkFrequency @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1554:17: expected 
unsigned int DclkFrequency
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1554:17: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1555:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
MinVddc @@ got short MinVddc @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1555:17: expected 
unsigned short MinVddc
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1555:17: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1587:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
Frequency @@ got ed int Frequency @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1587:17: expected 
unsigned int Frequency
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1587:17: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1588:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
MinVoltage @@ got short MinVoltage @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1588:17: expected 
unsigned short MinVoltage
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1588:17: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1617:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
Frequency @@ got ed int Frequency @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1617:17: expected 
unsigned int Frequency
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1617:17: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1618:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
MinVoltage @@ got short MinVoltage @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1618:17: expected 
unsigned short MinVoltage
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1618:17: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1648:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
Frequency @@ got ed int Frequency @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1648:17: expected 
unsigned int Frequency
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1648:17: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1649:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
MinVoltage @@ got short MinVoltage @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1649:17: expected 
unsigned short MinVoltage
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1649:17: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1676:36: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
McArbDramTiming @@ got ed int McArbDramTiming @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1676:36: expected 
unsigned int McArbDramTiming
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1676:36: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1677:36: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
McArbDramTiming2 @@ got ed int McArbDramTiming2 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1677:36: expected 
unsigned int McArbDramTiming2
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1677:36: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1767:53: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
s0 @@ got short s0 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1767:53: expected 
unsigned short s0
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1767:53: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1769:53: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
s1 @@ got short s1 @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1769:53: expected 
unsigned short s1
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1769:53: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1789:40: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
<noident> @@ got restrunsigned int <noident> @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1789:40: expected 
unsigned int <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:1789:40: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2106:17: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
<noident> @@ got restrunsigned int <noident> @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2106:17: expected 
unsigned int <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2106:17: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2122:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
SystemFlags @@ got ed int SystemFlags @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2122:9: expected 
unsigned int SystemFlags
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2122:9: got 
restricted __be32 <noident>
>> drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2123:9: sparse: 
>> incorrect type in assignment (different base types) @@ expected unsigned int 
>> VRConfig @@ got ed int VRConfig @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2123:9: expected 
unsigned int VRConfig
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2123:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2124:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
SmioMaskVddcVid @@ got ed int SmioMaskVddcVid @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2124:9: expected 
unsigned int SmioMaskVddcVid
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2124:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2125:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
SmioMaskVddcPhase @@ got ed int SmioMaskVddcPhase @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2125:9: expected 
unsigned int SmioMaskVddcPhase
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2125:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2126:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
SmioMaskVddciVid @@ got ed int SmioMaskVddciVid @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2126:9: expected 
unsigned int SmioMaskVddciVid
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2126:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2127:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
SmioMaskMvddVid @@ got ed int SmioMaskMvddVid @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2127:9: expected 
unsigned int SmioMaskMvddVid
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2127:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2128:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned int 
SclkStepSize @@ got ed int SclkStepSize @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2128:9: expected 
unsigned int SclkStepSize
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2128:9: got 
restricted __be32 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2129:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
TemperatureLimitHigh @@ got short TemperatureLimitHigh @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2129:9: expected 
unsigned short TemperatureLimitHigh
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2129:9: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2130:9: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
TemperatureLimitLow @@ got short TemperatureLimitLow @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2130:9: expected 
unsigned short TemperatureLimitLow
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2130:9: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2131:31: sparse: 
incorrect type in assignment (different base types) @@ expected unsigned short 
VddcVddciDelta @@ got short VddcVddciDelta @@
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2131:31: expected 
unsigned short VddcVddciDelta
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2131:31: got 
restricted __be16 <noident>
   drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c:2132:9: sparse: 
too many warnings

vim +2123 drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/ci_smumgr.c

  1974  
  1975  static int ci_init_smc_table(struct pp_hwmgr *hwmgr)
  1976  {
  1977          int result;
  1978          struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
  1979          struct ci_smumgr *smu_data = (struct ci_smumgr 
*)(hwmgr->smu_backend);
  1980          SMU7_Discrete_DpmTable  *table = &(smu_data->smc_state_table);
  1981          struct pp_atomctrl_gpio_pin_assignment gpio_pin;
  1982          u32 i;
  1983  
  1984          ci_initialize_power_tune_defaults(hwmgr);
  1985          memset(&(smu_data->smc_state_table), 0x00, 
sizeof(smu_data->smc_state_table));
  1986  
  1987          if (SMU7_VOLTAGE_CONTROL_NONE != data->voltage_control)
  1988                  ci_populate_smc_voltage_tables(hwmgr, table);
  1989  
  1990          if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
  1991                          PHM_PlatformCaps_AutomaticDCTransition))
  1992                  table->SystemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC;
  1993  
  1994  
  1995          if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
  1996                          PHM_PlatformCaps_StepVddc))
  1997                  table->SystemFlags |= PPSMC_SYSTEMFLAG_STEPVDDC;
  1998  
  1999          if (data->is_memory_gddr5)
  2000                  table->SystemFlags |= PPSMC_SYSTEMFLAG_GDDR5;
  2001  
  2002          if (data->ulv_supported) {
  2003                  result = ci_populate_ulv_state(hwmgr, &(table->Ulv));
  2004                  PP_ASSERT_WITH_CODE(0 == result,
  2005                          "Failed to initialize ULV state!", return 
result);
  2006  
  2007                  cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
  2008                          ixCG_ULV_PARAMETER, 0x40035);
  2009          }
  2010  
  2011          result = ci_populate_all_graphic_levels(hwmgr);
  2012          PP_ASSERT_WITH_CODE(0 == result,
  2013                  "Failed to initialize Graphics Level!", return result);
  2014  
  2015          result = ci_populate_all_memory_levels(hwmgr);
  2016          PP_ASSERT_WITH_CODE(0 == result,
  2017                  "Failed to initialize Memory Level!", return result);
  2018  
  2019          result = ci_populate_smc_link_level(hwmgr, table);
  2020          PP_ASSERT_WITH_CODE(0 == result,
  2021                  "Failed to initialize Link Level!", return result);
  2022  
  2023          result = ci_populate_smc_acpi_level(hwmgr, table);
  2024          PP_ASSERT_WITH_CODE(0 == result,
  2025                  "Failed to initialize ACPI Level!", return result);
  2026  
  2027          result = ci_populate_smc_vce_level(hwmgr, table);
  2028          PP_ASSERT_WITH_CODE(0 == result,
  2029                  "Failed to initialize VCE Level!", return result);
  2030  
  2031          result = ci_populate_smc_acp_level(hwmgr, table);
  2032          PP_ASSERT_WITH_CODE(0 == result,
  2033                  "Failed to initialize ACP Level!", return result);
  2034  
  2035          result = ci_populate_smc_samu_level(hwmgr, table);
  2036          PP_ASSERT_WITH_CODE(0 == result,
  2037                  "Failed to initialize SAMU Level!", return result);
  2038  
  2039          /* Since only the initial state is completely set up at this 
point (the other states are just copies of the boot state) we only */
  2040          /* need to populate the  ARB settings for the initial state. */
  2041          result = ci_program_memory_timing_parameters(hwmgr);
  2042          PP_ASSERT_WITH_CODE(0 == result,
  2043                  "Failed to Write ARB settings for the initial state.", 
return result);
  2044  
  2045          result = ci_populate_smc_uvd_level(hwmgr, table);
  2046          PP_ASSERT_WITH_CODE(0 == result,
  2047                  "Failed to initialize UVD Level!", return result);
  2048  
  2049          table->UvdBootLevel  = 0;
  2050          table->VceBootLevel  = 0;
  2051          table->AcpBootLevel  = 0;
  2052          table->SamuBootLevel  = 0;
  2053  
  2054          table->GraphicsBootLevel = 0;
  2055          table->MemoryBootLevel = 0;
  2056  
  2057          result = ci_populate_smc_boot_level(hwmgr, table);
  2058          PP_ASSERT_WITH_CODE(0 == result,
  2059                  "Failed to initialize Boot Level!", return result);
  2060  
  2061          result = ci_populate_smc_initial_state(hwmgr);
  2062          PP_ASSERT_WITH_CODE(0 == result, "Failed to initialize Boot 
State!", return result);
  2063  
  2064          result = ci_populate_bapm_parameters_in_dpm_table(hwmgr);
  2065          PP_ASSERT_WITH_CODE(0 == result, "Failed to populate BAPM 
Parameters!", return result);
  2066  
  2067          table->UVDInterval = 1;
  2068          table->VCEInterval = 1;
  2069          table->ACPInterval = 1;
  2070          table->SAMUInterval = 1;
  2071          table->GraphicsVoltageChangeEnable  = 1;
  2072          table->GraphicsThermThrottleEnable  = 1;
  2073          table->GraphicsInterval = 1;
  2074          table->VoltageInterval  = 1;
  2075          table->ThermalInterval  = 1;
  2076  
  2077          table->TemperatureLimitHigh =
  2078                  (data->thermal_temp_setting.temperature_high *
  2079                   SMU7_Q88_FORMAT_CONVERSION_UNIT) / 
PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
  2080          table->TemperatureLimitLow =
  2081                  (data->thermal_temp_setting.temperature_low *
  2082                  SMU7_Q88_FORMAT_CONVERSION_UNIT) / 
PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
  2083  
  2084          table->MemoryVoltageChangeEnable  = 1;
  2085          table->MemoryInterval  = 1;
  2086          table->VoltageResponseTime  = 0;
  2087          table->VddcVddciDelta = 4000;
  2088          table->PhaseResponseTime  = 0;
  2089          table->MemoryThermThrottleEnable  = 1;
  2090  
  2091          PP_ASSERT_WITH_CODE((1 <= 
data->dpm_table.pcie_speed_table.count),
  2092                          "There must be 1 or more PCIE levels defined in 
PPTable.",
  2093                          return -EINVAL);
  2094  
  2095          table->PCIeBootLinkLevel = 
(uint8_t)data->dpm_table.pcie_speed_table.count;
  2096          table->PCIeGenInterval = 1;
  2097  
  2098          result = ci_populate_vr_config(hwmgr, table);
  2099          PP_ASSERT_WITH_CODE(0 == result,
  2100                          "Failed to populate VRConfig setting!", return 
result);
  2101          data->vr_config = table->VRConfig;
  2102  
  2103          ci_populate_smc_svi2_config(hwmgr, table);
  2104  
  2105          for (i = 0; i < SMU7_MAX_ENTRIES_SMIO; i++)
  2106                  CONVERT_FROM_HOST_TO_SMC_UL(table->Smio[i]);
  2107  
  2108          table->ThermGpio  = 17;
  2109          table->SclkStepSize = 0x4000;
  2110          if (atomctrl_get_pp_assign_pin(hwmgr, VDDC_VRHOT_GPIO_PINID, 
&gpio_pin)) {
  2111                  table->VRHotGpio = gpio_pin.uc_gpio_pin_bit_shift;
  2112                  phm_cap_set(hwmgr->platform_descriptor.platformCaps,
  2113                                  PHM_PlatformCaps_RegulatorHot);
  2114          } else {
  2115                  table->VRHotGpio = SMU7_UNUSED_GPIO_PIN;
  2116                  phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
  2117                                  PHM_PlatformCaps_RegulatorHot);
  2118          }
  2119  
  2120          table->AcDcGpio = SMU7_UNUSED_GPIO_PIN;
  2121  
  2122          CONVERT_FROM_HOST_TO_SMC_UL(table->SystemFlags);
> 2123          CONVERT_FROM_HOST_TO_SMC_UL(table->VRConfig);
  2124          CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskVddcVid);
  2125          CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskVddcPhase);
  2126          CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskVddciVid);
  2127          CONVERT_FROM_HOST_TO_SMC_UL(table->SmioMaskMvddVid);
  2128          CONVERT_FROM_HOST_TO_SMC_UL(table->SclkStepSize);
  2129          CONVERT_FROM_HOST_TO_SMC_US(table->TemperatureLimitHigh);
  2130          CONVERT_FROM_HOST_TO_SMC_US(table->TemperatureLimitLow);
  2131          table->VddcVddciDelta = 
PP_HOST_TO_SMC_US(table->VddcVddciDelta);
  2132          CONVERT_FROM_HOST_TO_SMC_US(table->VoltageResponseTime);
  2133          CONVERT_FROM_HOST_TO_SMC_US(table->PhaseResponseTime);
  2134  
  2135          table->BootVddc = PP_HOST_TO_SMC_US(table->BootVddc * 
VOLTAGE_SCALE);
  2136          table->BootVddci = PP_HOST_TO_SMC_US(table->BootVddci * 
VOLTAGE_SCALE);
  2137          table->BootMVdd = PP_HOST_TO_SMC_US(table->BootMVdd * 
VOLTAGE_SCALE);
  2138  
  2139          /* Upload all dpm data to SMC memory.(dpm level, dpm level 
count etc) */
  2140          result = ci_copy_bytes_to_smc(hwmgr, smu_data->dpm_table_start +
  2141                                          
offsetof(SMU7_Discrete_DpmTable, SystemFlags),
  2142                                          (uint8_t 
*)&(table->SystemFlags),
  2143                                          
sizeof(SMU7_Discrete_DpmTable)-3 * sizeof(SMU7_PIDController),
  2144                                          SMC_RAM_END);
  2145  
  2146          PP_ASSERT_WITH_CODE(0 == result,
  2147                  "Failed to upload dpm data to SMC memory!", return 
result;);
  2148  
  2149          result = ci_populate_initial_mc_reg_table(hwmgr);
  2150          PP_ASSERT_WITH_CODE((0 == result),
  2151                  "Failed to populate initialize MC Reg table!", return 
result);
  2152  
  2153          result = ci_populate_pm_fuses(hwmgr);
  2154          PP_ASSERT_WITH_CODE(0 == result,
  2155                          "Failed to  populate PM fuses to SMC memory!", 
return result);
  2156  
  2157          ci_start_smc(hwmgr);
  2158  
  2159          return 0;
  2160  }
  2161  

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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