On 17/10/2021 01:18, Bjorn Andersson wrote:
The sc8180x has 2 DP and 1 eDP controllers, add support for these to the
DP driver.

Link: 
https://lore.kernel.org/linux-arm-msm/20210725042436.3967173-7-bjorn.anders...@linaro.org/
Signed-off-by: Bjorn Andersson <bjorn.anders...@linaro.org>

It seems that SC8180x DPU support was never merged (because of hw_interrupt rework, because of hw_catalog TODOs and FIXMEs). Could you please post new iteration of that patchset, squashing this one into it?


---

Changes since v4:
- Use the MSM_DP_CONTROLLER_n enums
- const the msm_dp_desc array

  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c |  6 +++---
  drivers/gpu/drm/msm/dp/dp_display.c            | 11 +++++++++++
  2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 47d5d71eb5d3..0ac6a79e8af9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -918,13 +918,13 @@ static const struct dpu_intf_cfg sc7280_intf[] = {
  };
static const struct dpu_intf_cfg sc8180x_intf[] = {
-       INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC8180X_MASK, 
MDP_SSPP_TOP0_INTR, 24, 25),
+       INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, MSM_DP_CONTROLLER_0, 24, 
INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
        INTF_BLK("intf_1", INTF_1, 0x6A800, INTF_DSI, 0, 24, INTF_SC8180X_MASK, 
MDP_SSPP_TOP0_INTR, 26, 27),
        INTF_BLK("intf_2", INTF_2, 0x6B000, INTF_DSI, 1, 24, INTF_SC8180X_MASK, 
MDP_SSPP_TOP0_INTR, 28, 29),
        /* INTF_3 is for MST, wired to INTF_DP 0 and 1, use dummy index until 
this is supported */
        INTF_BLK("intf_3", INTF_3, 0x6B800, INTF_DP, 999, 24, 
INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 30, 31),
-       INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, 1, 24, INTF_SC8180X_MASK, 
MDP_SSPP_TOP0_INTR, 20, 21),
-       INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, 2, 24, INTF_SC8180X_MASK, 
MDP_SSPP_TOP0_INTR, 22, 23),
+       INTF_BLK("intf_4", INTF_4, 0x6C000, INTF_DP, MSM_DP_CONTROLLER_1, 24, 
INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 20, 21),
+       INTF_BLK("intf_5", INTF_5, 0x6C800, INTF_DP, MSM_DP_CONTROLLER_2, 24, 
INTF_SC8180X_MASK, MDP_SSPP_TOP0_INTR, 22, 23),
  };
/*************************************************************
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index d3c9d7273354..70dcd4e6d466 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -135,8 +135,19 @@ static const struct msm_dp_config sc7180_dp_cfg = {
        .num_descs = 1,
  };
+static const struct msm_dp_config sc8180x_dp_cfg = {
+       .descs = (const struct msm_dp_desc[]) {
+               [MSM_DP_CONTROLLER_0] = { .io_start = 0x0ae90000, 
.connector_type = DRM_MODE_CONNECTOR_DisplayPort },
+               [MSM_DP_CONTROLLER_1] = { .io_start = 0x0ae98000, 
.connector_type = DRM_MODE_CONNECTOR_DisplayPort },
+               [MSM_DP_CONTROLLER_2] = { .io_start = 0x0ae9a000, 
.connector_type = DRM_MODE_CONNECTOR_eDP },
+       },
+       .num_descs = 3,
+};
+
  static const struct of_device_id dp_dt_match[] = {
        { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_cfg },
+       { .compatible = "qcom,sc8180x-dp", .data = &sc8180x_dp_cfg },
+       { .compatible = "qcom,sc8180x-edp", .data = &sc8180x_dp_cfg },
        {}
  };


--
With best wishes
Dmitry

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