Enable the DT nodes for HDMI TX and PHY and add the pinctrl for the few
involved pins that are configurable.

Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
---
 arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts 
b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 4c3ac4214a2c..fdf851865ba9 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -197,6 +197,16 @@ ethphy1: ethernet-phy@1 {
        };
 };
 
+&hdmi_tx {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hdmi>;
+       status = "okay";
+};
+
+&hdmi_tx_phy {
+       status = "okay";
+};
+
 &i2c1 {
        clock-frequency = <400000>;
        pinctrl-names = "default";
@@ -465,6 +475,15 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16      0x19
                >;
        };
 
+       pinctrl_hdmi: hdmigrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL     0x1c3
+                       MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA     0x1c3
+                       MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD         0x19
+                       MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC         0x19
+               >;
+       };
+
        pinctrl_i2c1: i2c1grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL         0x400001c3
-- 
2.30.2

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